Motorola 88110
Motorola's second-generation 88000 RISC microprocessor for workstations.
The MC88110, a Motorola microprocessor, ran the 88000 instruction set architecture. It was the second chip to implement this ISA, following the MC88100, and targeted personal computers and workstations.
Motorola first detailed the MC88110 at the Microprocessor Forum in San Francisco in November 1991. It launched in 1992 at 50 MHz. Customers included Data General for its AViiON servers, Harris for real-time UNIX systems, and Motorola itself for single-board computers. NeXT planned a workstation using it, the NeXT RISC Workstation, but left the hardware business and canceled the product before completion.
The chip added features to the original ISA, such as a separate floating-point register file, extended-precision (80-bit) floating-point types, and new integer and graphics instructions. It also introduced microarchitectural advances absent in earlier 88000 chips: two-way superscalar execution, out-of-order completion, and speculative execution. Despite fixing some flaws in the MC88100, the MC88110 saw little success and few systems used it. PowerPC microprocessors, developed jointly by Motorola and IBM through the AIM alliance, succeeded it, but the MC88110 remained available until the mid-1990s.
Externally, the 88110 used a von Neumann architecture (single memory for code and data), while internally it employed a modified Harvard architecture (separate instruction and data caches). An optional external secondary cache of 256 KB to 2 MB was supported, controlled by a separate MC88410 chip to keep costs down.
The die contained 1.3 million transistors and measured 15 mm by 15 mm (225 mm²). It was fabricated on a 1 μm CMOS process with three levels of aluminum interconnect and an effective channel length of 0.8 μm. The design could be shrunk to a 0.8 μm process with a 0.65 μm effective channel length without modification.
- Introduced
- 1992
- Clock speed
- 50 MHz
- Transistor count
- 1.3 million
- Die size
- 15 mm by 15 mm (225 mm²)
- Fabrication process
- 1 μm CMOS with three levels of aluminium interconnect and 0.8 μm effective channel length
- Secondary cache
- Optional external 256 KB to 2 MB via MC88410 controller
Lore & Background
The first technical description of the MC88110 was given in November 1991 at the Microprocessor Forum held in San Francisco. The microprocessor was introduced in 1992, operating at 50 MHz. Users included Data General in their AViiON servers, Harris in real-time UNIX systems, and Motorola in their single-board computers. NeXT was to introduce a workstation using the MC88110, the NeXT RISC Workstation, but they left the hardware business and cancelled the product before development had completed.
The MC88110 implemented extensions to the original ISA, such as a separate floating-point register file, extended-precision (80-bit) floating-point data types, and new integer and graphics instructions. It also introduced microarchitectural features previously non-existent in 88000 microprocessors, such as two-way superscalar execution, out-of-order completion, and speculative execution. Externally the 88110 has a von Neumann architecture (single memory for code and data) with a modified Harvard architecture internally (separate instruction and data caches).
The die contained 1.3 million transistors and measured 15 mm by 15 mm (225 mm²). It was fabricated in a 1 μm complementary metal–oxide–semiconductor (CMOS) process with three levels of aluminium interconnect and an effective channel length of 0.8 μm. The MC88110 was designed to be shrunk to a 0.8 μm process with an effective channel length of 0.65 μm without modification.
Reader's Guide
Despite introducing advanced microarchitectural features such as two-way superscalar execution, out-of-order completion, and speculative execution—which corrected some architectural deficiencies in the MC88100—the MC88110 was ultimately unsuccessful and was used in few systems. Its optional external secondary cache, controlled by the separate MC88410 device, was intended to reduce cost. The MC88110 was succeeded by PowerPC microprocessors that Motorola developed jointly with IBM as part of the AIM alliance, but it remained available until the mid-1990s. The microprocessor's limited adoption reflected the broader market shift away from the 88000 architecture toward the PowerPC platform.
Did You Know?
- The die measured 15 mm by 15 mm and contained 1.3 million transistors.
- NeXT planned a workstation using the MC88110 but cancelled it before development completed.
Frequently Asked Questions
What is the Motorola MC88110?
The MC88110 is Motorola's second-generation RISC microprocessor built around the 88000 instruction set architecture. It was designed as a successor to the MC88100 and aimed at the personal-computer and workstation segments.
What are the key specifications of the MC88110?
The chip shipped in 1992 at a 50 MHz clock speed, packs roughly 1.3 million transistors, and occupies a 15 mm × 15 mm die fabricated on a 1 μm CMOS process. It could be paired with an external secondary cache of 256 KB to 2 MB via the MC88410 controller.
Who were the notable customers of the MC88110?
Data General built its AViiON server line around the processor, and Harris deployed it in real-time UNIX systems. Motorola itself also used it in its own single-board computer products.
How does the MC88110 fit into the 88000 family?
It was the second implementation of the 88000 ISA, following the original MC88100. Motorola first presented the chip at the Microprocessor Forum in San Francisco in November 1991 before its 1992 commercial launch.
Did NeXT ever ship a computer with the MC88110?
NeXT had planned a NeXT RISC Workstation built around the processor, but the company exited the hardware business and canceled the product before it ever reached the market.
More in Microprocessors, Part 3 1-24
Spotted an error? Know more?
Reader corrections go straight into our review queue. Suggest an edit · How this site is sourced