MIPS-X
A RISC follow-on to MIPS, never commercialized as a workstation CPU.
Credit: X-ray: NASA/CXC/SAO/J. Drake et al, IR: NASA/JPL-Caltech/Spitzer; Image · Public domain
MIPS-X is a RISC microprocessor and instruction set architecture created as a successor to the original MIPS project at Stanford University, developed by the same team. Funded by DARPA, work began in 1984, and the design was finalized in papers published between 1986 and 1987. Unlike the earlier MIPS architecture, MIPS-X never saw use as a workstation CPU; instead, it appeared primarily in embedded systems, particularly chips from Integrated Information Technology (IIT) aimed at digital video processing.
Although designed by the same group and architecturally similar, MIPS-X is not instruction-set compatible with the standard MIPS R-series processors. It introduced a delayed branch mechanism with two delay slots. The processor also includes a Processor Status Word (PSW) register, which holds flags for enabling interrupts, overflow exceptions, and other status information. As of late 2005, MIPS-X support was limited to specialized toolchains like Green Hills Software, and it was notably absent from the GNU Compiler Collection (GCC).
MIPS-X gained significance among DVD player firmware hackers because many DVD players—especially low-cost models—use chips based on IIT designs, produced by ESS Technology, as their main processor. Devices like the ESS VideoDrive system-on-a-chip (SoC) also incorporate a digital signal processor (DSP) coprocessor for decoding MPEG audio and video streams.
Quick Facts
- Bits
- 32-bit
- Design
- RISC
- Predecessor
- Stanford MIPS
Facts from the source article.
Lore & Background
MIPS-X was designed by the same team that created the original MIPS architecture at Stanford University, beginning in 1984 with support from DARPA. Its final specification was documented in papers released in 1986–87. Although architecturally very similar to its predecessor, MIPS-X is instruction-set incompatible with the mainline MIPS R-series processors. The processor introduced the concept of a delayed branch, which includes two delay slots. It also includes a Processor Status Word (PSW) register containing flags that enable interruptions, overflow exceptions, and other status information. MIPS-X was never commercialized as a workstation CPU; instead, it appeared primarily in embedded systems based on chips designed by Integrated Information Technology (IIT) for digital video applications. The processor is obscure enough that, as of November 20, 2005, support for it was provided only by specialist developers such as Green Hills Software, and was notably missing from the GNU Compiler Collection (GCC).
Reader's Guide
MIPS-X's significance lies in its role as a follow-on RISC design from the Stanford MIPS team, supported by DARPA, that never achieved commercial workstation status but found a niche in embedded systems. Its legacy is most visible in the consumer electronics market, particularly among DVD player firmware hackers. Many DVD players, especially low-end devices, use chips based on the IIT design, produced by ESS Technology, as their central processor. Devices such as the ESS VideoDrive system on a chip (SoC) also include a digital signal processor (DSP) coprocessor for decoding MPEG audio and video streams. The processor's obscurity is reflected in its limited software support; as of late 2005, only specialist developers like Green Hills Software provided toolchains, with GCC notably lacking support. This has made MIPS-X a specialized but important platform for embedded digital video applications, particularly in the DVD player market.
Did You Know?
- It introduced a delayed branch with two delay slots.
- The Processor Status Word (PSW) register contains flags for interruptions and overflow exceptions.
- As of November 20, 2005, support for MIPS-X was missing from the GNU Compiler Collection (GCC).
Gallery
Frequently Asked Questions
What is MIPS-X?
MIPS-X is a RISC instruction set architecture that grew out of the original MIPS research at Stanford University, funded by DARPA beginning in 1984. It was documented in academic papers published in 1986 and 1987 but never shipped as a general-purpose workstation processor.
What is MIPS-X's primary role or use case?
Rather than targeting desktop or server markets, MIPS-X found its niche in embedded applications, most notably in digital video processing chips produced by Integrated Information Technology (IIT).
Why is MIPS-X important to microprocessor history?
It represents a parallel experimental branch of the MIPS lineage that explored a different architectural direction, including a delayed-branch mechanism with two delay slots. Though it never reached the market at scale, it shows how the Stanford team pushed RISC design ideas beyond what the commercial MIPS R-series adopted.
Is MIPS-X compatible with the main MIPS R-series?
No—despite being built by the same Stanford group and sharing a similar RISC philosophy, MIPS-X is instruction-set incompatible with the MIPS R-series. The two architectures cannot run each other's code without translation.
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