Microprocessors, Part 3 Codexery

Alpha 21164

A four-issue superscalar Alpha microprocessor with on-die secondary cache.

Alpha 21164

The Alpha 21164, also known by its code name EV5, is a microprocessor developed and fabricated by Digital Equipment Corporation that implemented the Alpha instruction set architecture (ISA). It was introduced in January 1995, succeeding the Alpha 21064A as Digital's flagship microprocessor, and was succeeded by the Alpha 21264 in 1998.

Introduction
January 1995
Clock frequencies
266 MHz, 300 MHz, 333 MHz
Transistor count
9.3 million
Die size
16.5 by 18.1 mm (299 mm²)
Process
CMOS-5, a 0.50 μm process with four levels of aluminium interconnect
Power dissipation
46 W at 266 MHz, 51 W at 300 MHz, 56 W at 333 MHz
Package
499-pin ceramic interstitial pin grid array (IPGA) measuring 57.40 by 57.40 mm

Lore & Background

First silicon of the Alpha 21164 was produced in February 1994, and the OpenVMS, Digital UNIX and Windows NT operating systems were successfully booted on it. It was sampled in late 1994 and introduced in January 1995 at 266 MHz. A 300 MHz version was introduced in March 1995, and the final 333 MHz version was announced on 2 October 1995, available in sample quantities. The Alpha 21164 was replaced by the Alpha 21164A as Digital's flagship microprocessor in 1996 when a 400 MHz version became available in volume quantities.

The Alpha 21164 is a four-issue superscalar microprocessor capable of issuing a maximum of four instructions per clock cycle to four execution units: two integer and two floating-point. The integer pipeline is seven stages long, and the floating-point pipeline is ten stages long. It implemented a 43-bit virtual address and a 40-bit physical address, capable of addressing 8 TB of virtual memory and 1 TB of physical memory. The integer unit consisted of two pipelines, the add pipeline and the multiply pipeline, with the integer register file containing forty 64-bit registers. The floating-point unit had two pipelines, one executing all instructions except multiply, and the other executing only multiply instructions.

The 21164 has three levels of cache: two on-die and one external and optional. The primary cache is split into 8 KB instruction and data caches, direct-mapped with 32-byte cache lines. The secondary cache, known as the S-cache, is on-die with a capacity of 96 KB, three-way set associative, and required two cycles to access. The tertiary cache, known as the B-cache, is implemented with external SRAMs, optional, with a capacity of 1 to 64 MB, direct-mapped. The external interface is a 128-bit system bus operating at a clock frequency 3 to 15 times lower than the internal clock frequency. The internal clock frequency is generated by dividing an external clock signal by two. The die was fabricated in Digital's CMOS-5 process and contained 9.3 million transistors on a die measuring 299 mm².

Reader's Guide

The Alpha 21164 continued the performance lead from the 275 MHz Alpha 21064A until the introduction of the Intel Pentium Pro in November 1995, when a 200 MHz version outperformed the 300 MHz 21164 on the SPECint95_base benchmark suite. The 21164 retained its floating-point performance lead. The 333 MHz 21164 introduced the following year outperformed the Pentium Pro, but it was later surpassed by the MIPS Technologies R10000 and then by the Hewlett-Packard PA-8000 in the same year. Digital used the Alpha 21164 in their AlphaServer servers, AlphaStation workstations, Alpha VME single board computers, and AlphaPC motherboards. Cray Research used a 300 MHz Alpha 21164 in their T3E-600 supercomputer. Third parties such as DeskStation also built workstations using the Alpha 21164. The Alpha 21164 was the basis of a further development code-named EV56, introduced as the Alpha 21164A, which operated at clock frequencies up to 666 MHz and was fabricated by Digital and Samsung Electronics.

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