Puma (microarchitecture)

Lore & Background

Puma cores use the same microarchitecture as Jaguar, inheriting out-of-order execution, speculative execution, and a design with up to four CPU cores. It features two-way integer execution and two-way 128-bit wide floating-point and packed integer execution, along with an integer hardware divider. Puma does not feature clustered multi-thread (CMT), meaning there are no modules, and it does not support Heterogeneous System Architecture or zero-copy. Each core has 32 KiB instruction and 32 KiB data L1 cache, with a unified L2 cache of 1–2 MiB shared by two or four cores. The integrated memory controller is single channel, supporting 64-bit DDR3L.

Improvements over Jaguar include a 19% reduction in CPU core leakage at 1.2V, a 38% reduction in GPU leakage, a 500 mW reduction in memory controller power, and a 200 mW reduction in display interface power. Puma introduces chassis temperature aware turbo boost and selective boosting according to application needs (intelligent boost). It also adds support for ARM TrustZone via an integrated Cortex-A5 processor and support for DDR3L-1866 memory. AMD later released a revision, Puma+, integrated into the Carrizo-L APU platform.

Reader's Guide

Puma represents AMD's second-generation low-power microarchitecture for APUs, refining the Jaguar design with significant power reductions and new features. The 19% CPU core leakage reduction and 38% GPU leakage reduction at 1.2V, along with lower memory controller and display interface power, made it suitable for thermally constrained devices like notebooks and tablets. The introduction of chassis temperature aware turbo boost and intelligent boost allowed dynamic performance scaling based on application needs and thermal conditions. Support for ARM TrustZone via an integrated Cortex-A5 processor added a hardware security capability. Puma's design, lacking clustered multi-thread and Heterogeneous System Architecture, kept it focused on efficiency rather than high-end performance. The Puma+ revision, integrated into the Carrizo-L platform, extended the architecture's lifespan. Overall, Puma served as a key component in AMD's low-power mobile strategy, targeting the same market as Jaguar with incremental improvements in power efficiency and feature set.