Athlon II
Budget to mid-range AMD processors without L3 cache.
The Athlon II is a family of AMD multi-core 45 nm central processing units aimed at the budget to mid-range market. It serves as a complementary product lineup to the Phenom II, based on the AMD K10 architecture and derived from the Phenom II series, but unlike its Phenom siblings, it does not contain any L3 cache.
Quick Facts
- Produced-Start
- 2009
- Slowest
- 1.6
- Fastest
- 3.5
- Hypertransport-Slowest
- 1.8
- Hypertransport-Fastest
- 2
- Hypertransport-Slow-Unit
- GHz
- Soldby
- AMD
Facts from the source article.
Lore & Background
The Athlon II series was introduced in June 2009 with the dual-core Regor die, a native dual-core design with lower TDP and additional L2 cache to offset the removal of L3 cache. The Regor die measures 117 mm² and supports TDPs from 25 to 65 Watts. Some Regor chips are chip-harvested from Propus or Deneb dies with two cores disabled. The triple-core Rana, released in October 2009, is derived from the Propus quad-core design with one core disabled, and the quad-core Propus, released in September 2009, is chip-harvested from the Deneb die with L3 cache disabled. Both Rana and Propus have a die size of 169 mm² and TDPs of 45 or 95 Watts.
Processors with an "e" following the model number (e.g., 245e) are low-power models, typically 45W for Athlons, while those with a "u" (e.g., 250u) are ultra-low voltage models. The Athlon II X2 200e-220 chips have less L2 cache than the rest of the Regor line. In some cases, the Phenom II Deneb die is used with disabled L3 cache and cores. All cores support MMX, Extended 3DNow!, SSE, SSE2, SSE3, SSE4a, AMD64, Cool'n'Quiet, NX bit, and AMD-V.
Reader's Guide
The Athlon II series occupies a significant position in AMD's lineup as a budget-to-mid-range offering that complements the Phenom II. By removing the L3 cache and adjusting L2 cache sizes, AMD created processors that could be sold at lower price points while maintaining compatibility with the AM3 socket and DDR3 memory. The use of chip-harvested dies from higher-end Phenom II parts (Deneb and Propus) allowed AMD to utilize silicon that might otherwise be discarded, improving manufacturing yields. The introduction of low-power "e" and ultra-low-voltage "u" models expanded the series into energy-efficient segments. The Athlon II's reliance on the K10 architecture and features like AMD Direct Connect Architecture, AMD Wide Floating Point Accelerator, and AMD PowerNow!/Cool'n'Quiet technology made it a capable performer for its intended market. The series ultimately provided a broad range of dual-core, triple-core, and quad-core options, with clock rates spanning from 1.6 GHz to 3.6 GHz, serving users who did not require the L3 cache present in the more expensive Phenom II line.
Did You Know?
- The Athlon II series is based on the AMD K10 architecture but lacks any L3 cache.
- The Regor die is a native dual-core design with 1 MB L2 cache per core, except for the Athlon II X2 200e-220 which has 512 kB per core.
- Processors with an 'e' suffix are low-power models (typically 45W for Athlons), while 'u' suffix denotes ultra-low voltage models.
Frequently Asked Questions
What is the Athlon II in simple terms?
The Athlon II is AMD's budget-to-mid-range multi-core processor family built on the 45 nm K10 architecture. It targets cost-conscious builders who want solid multi-threaded performance without paying for the extra L3 cache tier found in the Phenom II line.
How does the Athlon II actually differ from the Phenom II?
Both families share the same K10 core design and 45 nm manufacturing process, but the Athlon II omits the shared L3 cache that Phenom II chips include. This lets AMD price the silicon lower while keeping identical per-core execution units.
What core configurations does the Athlon II come in?
AMD shipped three variants: Regor (dual-core), Rana (triple-core), and Propus (quad-core). Each core carries 1 MB of L2 cache, except the low-power Athlon II X2 200e-220, which trims that to 512 kB per core.
Which socket and memory does the Athlon II support?
It plugs into the AM3 socket and natively handles dual-channel DDR3-1333, while AM2+ boards can still run DDR2-1066 through the same integrated memory controller. The chip links to the rest of the platform over a 2 GHz HyperTransport bus.
Why did AMD create a separate Athlon II line instead of just selling cheaper Phenom II chips?
By stripping the L3 cache, AMD could cut manufacturing cost and undercut competitors in the budget segment without diluting the Phenom II's premium positioning. It gave them a clean way to offer the same K10 per-core performance at a more accessible price point.
More in Intel and AMD Microprocessors, Part 3 1-24
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