IA-64

Lore & Background

In 1989, HP became concerned that RISC architectures were approaching a processing limit at one instruction per cycle. Both Intel and HP researchers had been exploring computer architecture options and separately began investigating a new concept known as very long instruction word (VLIW), which came out of research by Yale University in the early 1980s. VLIW is a computer architecture concept where a single instruction word contains multiple instructions encoded in one very long instruction word to facilitate the processor executing multiple instructions in each clock cycle. Typical VLIW implementations rely heavily on sophisticated compilers to determine at compile time which instructions can be executed at the same time and the proper scheduling of these instructions for execution and also to help predict the direction of branch operations.

Intel and HP partnered in 1994 to develop the IA-64 ISA, using a variation of VLIW design concepts which Intel named explicitly parallel instruction computing (EPIC). Intel's goal was to leverage the expertise HP had developed in their early VLIW work along with their own to develop a volume product line targeted at high-end enterprise server and high-performance computing (HPC) requirements, while HP wished to be able to purchase off-the-shelf processors built using Intel's volume manufacturing and contemporary process technology that were better than their PA-RISC processors. Intel took the lead on the design and commercialization process, while HP contributed to the ISA definition, the Merced/Itanium microarchitecture, and Itanium 2. The original goal year for delivering the first Itanium family product, Merced, was 1998.

By 1997, it was apparent that the IA-64 architecture and the compiler were much more difficult to implement than originally thought, and the delivery of Itanium began slipping. Since Itanium was the first ever EPIC processor, the development effort encountered more unanticipated problems than the team was accustomed to. In addition, the EPIC concept depended on compiler capabilities that had never been implemented before, so more research was needed. Intel announced the official name of the processor, Itanium, on October 4, 1999. Within hours, the name Itanic had been coined on a Usenet newsgroup as a pun on the name Titanic, the 'unsinkable' ocean liner that sank on its maiden voyage in 1912.

Reader's Guide

IA-64's significance lies in its radical departure from existing architectures, aiming to shift the burden of instruction scheduling from hardware to the compiler through EPIC. This approach was intended to simplify processor design while enabling high instruction-level parallelism, with cores executing up to six instructions per cycle. However, the architecture faced substantial implementation difficulties, and the compiler technology required proved far more complex than anticipated, causing repeated delays. The architecture's incompatibility with x86 was a critical strategic factor: AMD, never invited to contribute to IA-64, announced its own 64-bit extension to x86 (AMD64) the day after Itanium's naming, positioning it as an evolutionary, backward-compatible alternative. This created a competing 64-bit standard that ultimately gained far wider adoption. IA-64 achieved design wins with most enterprise server OEMs and was the fourth-most deployed microprocessor architecture for enterprise-class systems in 2008, behind x86-64, Power ISA, and SPARC. Operating system support included Windows Server 2003 through Server 2008 R2, HP-UX (support ended December 2025), OpenVMS, FreeBSD (discontinued in FreeBSD 11), and Linux (dropped by version 6.7 in 2024, though still supported in Linux 6.6 LTS). Intel announced discontinuation of the last supported CPUs in 2019, with final shipments in July 2021. IA-64 support was removed from the Linux kernel in November 2023 and is since maintained out-of-tree.

Did You Know?

• The IA-64 ISA originated at Hewlett-Packard and was implemented by Intel in collaboration with HP.
• The first Itanium processor, codenamed Merced, was released in 2001.
• The name 'Itanic' was coined on a Usenet newsgroup within hours of Intel's October 4, 1999 announcement of the Itanium name.
• AMD announced its x86 64-bit extension (AMD64) on October 5, 1999, the day after Itanium's naming.

Architecture Philosophy: The EPIC Vision

In 1989, Hewlett-Packard grew uneasy that the reduced instruction set computing paradigm was nearing a hard ceiling of one instruction per clock cycle. Around the same period, Yale University researchers had published work on a concept called very long instruction word, in which a single extremely long instruction word bundles multiple operations so the hardware can retire them simultaneously. Both HP and Intel independently began exploring this idea as a path beyond conventional designs. In 1994 the two companies formalized a partnership, adopting a variant of VLIW that Intel branded explicitly parallel instruction computing. The core philosophy was radical: rather than letting the silicon detect and resolve instruction dependencies at runtime the way superscalar chips do, the burden of scheduling parallel work was shifted entirely to the compiler at build time. In every Itanium core through the Tukwila generation, the processor could retire as many as six instructions in a single cycle, a figure made possible only because the compiler had already arranged them. HP contributed its early VLIW research and helped shape the ISA and the Merced and Itanium 2 microarchitectures, while Intel assumed the lead on design and commercialization. The original target for shipping the first chip, codenamed Merced, was 1998, but the unprecedented complexity of building the first EPIC processor pushed delivery into 2001.

The AMD Counterpunch and the 'Itanic' Joke

Intel poured enormous resources into marketing IA-64 and industry engagement, securing design wins from the majority of enterprise server OEMs, including companies that had previously built on RISC platforms. Compaq chose to abandon further development of its Alpha line, and Silicon Graphics made the same call with MIPS, both migrating their roadmaps toward IA-64. Industry analysts predicted the architecture would eventually supplant both RISC and CISC for all general-purpose computing. Yet the launch was dogged by delays; by 1997 it was clear the EPIC compiler and architecture were far harder to implement than anticipated, and the first product slipped well past its 1998 target. On October 4, 1999, Intel officially unveiled the name Itanium. Within hours, a Usenet newsgroup had already coined the pun 'Itanic,' referencing the unsinkable ocean liner that sank on its maiden voyage in 1912. The very next day, October 5, AMD announced its plans to extend the x86 instruction set with a fully backward-compatible 64-bit mode in its upcoming SledgeHammer processor. AMD had never been invited to contribute to the IA-64 effort, and its announcement immediately reframed the competitive landscape.

Software Ecosystem and the Trillium Consortium

Building an operating system ecosystem for an entirely new ISA was a massive undertaking. Multiple groups worked on ports, including Microsoft Windows, various Unix and Unix-like systems such as Linux, HP-UX, FreeBSD, Solaris, Tru64 UNIX, and Monterey/64, though the last three were canceled before reaching the market. In 1999, Intel spearheaded the formation of an open-source industry consortium to port Linux to IA-64, initially named Trillium and later renamed Trillian after a trademark dispute. The group included Caldera Systems, CERN, Cygnus Solutions, Hewlett-Packard, IBM, Red Hat, SGI, SuSE, TurboLinux, and VA Linux Systems. Thanks to this collaboration, a working IA-64 Linux was delivered ahead of schedule and became the first operating system to run on the new Itanium processors. On the Windows side, support spanned from Server 2003 through Server 2008 R2, after which Microsoft dropped the architecture. The Linux kernel maintained IA-64 support for considerably longer, retaining it in mainline until version 6.7 in 2024, while the 6.6 long-term support branch continues to carry it.

A Long Fade and Lingering Niche

By 2008, IA-64 occupied the fourth spot among microprocessor architectures in enterprise-class deployments, sitting behind x86-64, Power ISA, and SPARC. That was arguably the architecture's high-water mark. In 2019, Intel declared that the final supported processors for the IA-64 family would be phased out, effectively closing the production chapter that had begun with Merced in 2001. The software ecosystem then entered a slow, staggered wind-down. FreeBSD dropped IA-64 support in version 11. HP-UX, which had been a long-time partner, ended its support in December 2025. OpenVMS, however, continues to support the architecture, making it one of the very few mainstream operating systems still shipping IA-64 binaries. A small community project called T2 Linux keeps the architecture alive through an out-of-tree kernel patch, ensuring that developers and enthusiasts can still compile and run code on Itanium hardware. For a design that once promised to reshape all of computing, IA-64's final chapter is a quiet, niche persistence.