Uncore
Intel term for non-core functions integrated for high performance.
Uncore is Intel's name for the parts of a microprocessor that sit outside the core but still need a tight connection to it for good performance. The term first appeared with the Nehalem design, and since Sandy Bridge it has also been called the system agent. This part of the chip takes over jobs once handled by the northbridge: managing QPI links, the L3 cache, the snoop agent pipeline, the on-die memory controller, the on-die PCI Express Root Complex, and the Thunderbolt controller. Putting these functions on the same die as the cores shortens the physical distance data must travel, which cuts down access delays.
- Introduced with
- Nehalem microarchitecture
- Also called
- system agent (since Sandy Bridge microarchitecture)
- Uncore clock base
- 2.66 GHz
- Uncore clock overclock limit
- in excess of 3.44 GHz
- Latency reduction to dram
- typically 10 ns or more
Lore & Background
The Uncore was introduced with the Nehalem microarchitecture, marking a shift in how Intel organized on-die components. It consolidated functions traditionally assigned to the northbridge—such as QPI controllers, L3 cache, snoop agent pipeline, on-die memory controller, on-die PCI Express Root Complex, and Thunderbolt controller—into a single domain closely coupled with the processor cores. With the Sandy Bridge microarchitecture, Intel began referring to this domain as the 'system agent.' The core component, in contrast, consists of the control unit, ALU, FPU, and L1 and L2 caches. Other bus controllers such as SPI and LPC remain part of the chipset (Platform Controller Hub), the equivalent of the southbridge. Further integration has since eliminated the PCH from the motherboard for a system-in-package design on mobile SKUs.
Reader's Guide
The Uncore's significance lies in its role as a bridge between the processor cores and the rest of the system, enabling higher performance by reducing latency. By integrating northbridge functions onto the same die as the cores, the Uncore eliminates the need for external buses that would otherwise add delay. This is particularly evident in the on-die memory controller, which reduces core access times to DRAM by 10 ns or more. The removal of serial bus controllers from the Uncore further enables increased performance by allowing the uncore clock (UCLK) to run at a base of 2.66 GHz, with overclocking limits in excess of 3.44 GHz. This increased clock rate allows the core to access critical functions with significantly less latency. The Uncore's modular architecture, as seen in Nehalem-EX, includes units such as the cache box (CBox) for last-level cache and coherency, the PBox for QPI links, the MBox for memory controllers, and the UBox and RBox for system configuration and routing. Over time, the Uncore/system agent has become a standard part of Intel's processor design, though its exact composition has evolved with each microarchitecture.
Did You Know?
- The Uncore was introduced with the Nehalem microarchitecture and has been called 'system agent' since Sandy Bridge.
- The Uncore handles functions traditionally assigned to the northbridge, including QPI controllers, L3 cache, and on-die memory controller.
- Integration of Uncore functions into the core reduces core access times to DRAM by typically 10 ns or more.
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