Intersil 6100

Lore & Background

The 6100 family was produced using CMOS rather than the bipolar and NMOS technologies used by most of its contemporaries, such as the Z80, 8080, 6502, 6800, and 9900. As a result of its CMOS technology and low clock speeds, it had relatively low power consumption and could be used in high-reliability embedded systems without significant thermal management, provided the rest of the system was also CMOS. The 6100 was available to military specification and, being dual-sourced by Intersil and Harris, was used in some military products as a low-power alternative to the 8080 and 6800. Although it had a very simple instruction set and architecture, it was suitable for embedded systems that had previously used discrete logic circuits, Ledex motorised rotary switches, or relay-based logic controllers.

The 6100 closely emulates the PDP-8. It has three primary registers: a 12-bit program counter (PC), a 12-bit accumulator (AC), and a multiplier-quotient register (MQ). All two-operand instructions read the AC and MQ and write back to the AC. There is no stack pointer; subroutines return by jumping back into the main code, typically storing the return address in the first word of the subroutine itself. This makes subroutines in ROM difficult. Conditionals allow only the next instruction to be skipped, so branches are constructed with a conditional and a following jump. There is one maskable interrupt; when triggered, the CPU stores the current PC in address 0000 and starts executing from 0001. The interrupt can be enabled or disabled using ION (or SKON) and IOF instructions. The 12-bit data/address bus limits RAM to 4K words (6 KB) without expansion. Memory references are 7-bit, offset from address 0 or from the PC page base address. Memory could be expanded using the optional IM6102 support chip, which added three address lines and expanded memory to 32K words (48 KB) via internal IFR and DFR registers.

Reader's Guide

The Intersil 6100 found use in a number of commercial products. It was first used, according to Byte magazine, in the Pacific Cyber/Metrix PCM-12 in 1976. Its low power needs led to its use in the Hagelin HC-520 battery-powered portable cipher machine, introduced in 1977. The 6100 family was also used in the 1977 DECmate line, DEC's first attempt to produce a personal computer. Intersil sold the integrated circuits commercially through 1982 as the IM6100 family. However, it was not priced competitively, and the offering failed. The introduction of the IBM PC in 1981 cemented the doom of the 'CMOS-8s'. The 6100 was later upgraded to the 6120, which integrated the memory controller. Intersil offered a range of supporting chips, including the IM6101 PIE (Programmable Interface Element), the IM6102 MEDIC (Memory Extension, DMA Controller, Interval Timer), the IM6103 PIO (Parallel Input-Output Port), and the IM6402/IM6403 UART. Compatible RAM and ROM were also available, such as the IM6551 and IM6561 SRAM, the IM6512 SRAM, and the IM6312 mask-programmable PROM. A selection of these components were offered as parts of the Intersil 6801 CMOS Family Sampler Kit, and with the 6960 Sampler PC Board, a single-board system including the IM6100 CPU, IM6101 PIE, IM6312 ODT Monitor ROM, three 256×4 CMOS RAMs, and an IM6403 UART.

Did You Know?

• The Intersil 6100 was sometimes referred to as the CMOS-PDP8.
• It could operate from a single supply over the wide range of 4–11 V.
• The 6100 was later upgraded to the 6120, with the 6102 memory controller built-in.