Ferranti F100-L
Europe's first 16-bit microprocessor, built for military environments.
The Ferranti F100-L was a 16-bit microprocessor family that Ferranti first announced in 1976, with production beginning the following year. It ranked among the earliest single-chip 16-bit CPUs and was the first such design created in Europe. Built for military applications, the chip could withstand a very broad temperature range and was radiation hardened. To achieve this, Ferranti used bipolar junction transistors instead of the metal oxide semiconductor (MOS) process typical of most contemporary processors. The family included several support chips, such as a multiply/divide unit, memory support chips, timers, and serial bus controllers.
In 1978, the F100 cost £39 in quantities of 100. Three models were offered at that same price: a commercial version rated at 8 MHz, an industrial version at 6.5 MHz with an extended temperature range, and a military version at 3.5 or 5 MHz with a temperature range of -55°C to +125°C. It was very cost-competitive in the industrial and military markets, but less so commercially, where processors like the MOS 6502 cost about $11 in the same quantity.
The line was updated in 1984 with the F200-L, which was software-compatible with the F100. It integrated the maths processor on the same die, expanded addressing to 128 kB, and allowed up to 1 MB of memory when used with the new F220 memory management unit. Shortly after the F200 reached the market, Ferranti purchased International Signal and Control in 1987. That company was soon found to be committing large-scale fraud, which drove Ferranti into bankruptcy. The chip division was bought by Plessey, which continued producing some F100 family support chips as late as 1995. Because it was used almost entirely in military systems, the F100 is little known in the wider retrocomputing community, and few examples survive.
- Announced
- 1976
- Production start
- 1977
- Bit width
- 16-bit
- Clock speeds
- 8 MHz (commercial), 6.5 MHz (industrial), 3.5 or 5 MHz (military)
- Temperature range (military)
- -55°C to +125°C
- Price (100-off, 1978)
- £39
- Package
- 40-pin DIP
Lore & Background
The F100-L was developed using Ferranti's licensed collector-diffusion-isolation (CDI) bipolar process, which allowed higher power handling and operation in electrically noisy environments compared to MOS. To fit within a 40-pin DIP, data and address lines shared pins, requiring multiple cycles per instruction. The arithmetic logic unit used a bit-serial architecture to stay within a gate budget of about 1,000 gates, though the final design used roughly 1,500 gates on a 5.8 mm square die. The 8 MHz clock speed was roughly double that of the fastest MOS-based CPUs of the era, but the bit-serial design meant a minimum of 36 clock cycles per instruction.
The family included support chips such as the F101-L multiply/divide unit, memory bus interfaces, interrupt controllers, DMA controllers, and serial bus controllers, many built using Ferranti's uncommitted logic arrays (ULAs). A multi-card rackmount version, the F100-M, served as a development platform and saw some civilian use. Programming tools were initially written in FORTRAN, but most projects used CORAL once a compiler became available.
The F100 was priced at £57 in 100-unit lots at announcement in 1977, reduced to £39 by 1978. While uncompetitive with MOS-based commercial processors like the $11 MOS 6502, it was very competitive with other military-spec designs such as the Z80's military-rated unit at $165.
Reader's Guide
The F100-L's significance lies in its role as a pioneering European 16-bit microprocessor tailored specifically for military applications. Its use of bipolar junction transistors and the CDI process gave it radiation hardness and a wide operating temperature range, making it suitable for defense projects where MOS processors could not be relied upon. The UK Ministry of Defence sponsored its development, recognizing the microprocessor as a strategic shift in military computing. The F100 quickly found use in UK defense projects, notably in guidance systems.
Its legacy is limited by its narrow market focus. The line was updated with the software-compatible F200-L in 1984, which integrated the maths processor and expanded addressing. However, Ferranti's 1987 purchase of International Signal and Control, a company soon discovered to be committing large-scale fraud, drove Ferranti into bankruptcy. The chip division was purchased by Plessey, which continued producing some F100 family support chips as late as 1995. Because it was used almost entirely in the military realm, the F100 is little known in the wider retrocomputing field, and few examples remain.
Did You Know?
- The F100-L was among the first 16-bit single-chip CPUs and the first 16-bit design to be designed in Europe.
- It used a bit-serial ALU architecture, requiring a minimum of 36 clock cycles per instruction.
- The F100 was implemented using bipolar junction transistors rather than the MOS process used by most other processors of the era.
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