Silvermont

Lore & Background

Silvermont was the first Atom processor to feature an out-of-order architecture, a significant departure from the in-order Bonnell design. It was built on a 22 nm manufacturing process using 3D tri-gate transistors, a technology previously introduced with Ivy Bridge. The microarchitecture supported SSE4.2 instructions and integrated Gen 7 Intel HD Graphics with DirectX 11, OpenGL 4.0, and OpenCL 1.1 support; on Android, the graphics were OpenGL ES 3.1 certified. Consumer chips scaled up to quad-core, while business-class chips reached eight cores. Thermal design power ranged from 4.5 W for mobile processors to 20 W for server and communications processors.

Silvermont was announced on May 6, 2013, at Intel's Santa Clara headquarters. Intel stated that the first Bay Trail devices would be available during the Holiday 2013 timeframe, while leaked slides indicated a release window for Bay Trail-T of August 28 to September 13, 2013. Both Avoton and Rangeley were announced as available in the second half of 2013. The first Merrifield devices were announced in the first half of 2014. According to the tick–tock model, Airmont is the 14 nm die shrink of Silvermont, launched in early 2015 and first seen in the Atom x7-Z8700 used in the Microsoft Surface 3.

Silvermont-based cores were also used, modified, in the Knights Landing iteration of Intel's Xeon Phi HPC chips. Intel licensed Airmont CPU cores to Spreadtrum (now UNISOC) for use with two SoCs launched in 2017: SC9861G-IA and SC9853l.

Reader's Guide

Silvermont's significance lies in its architectural leap for Intel's low-power line, introducing out-of-order execution to Atom processors for the first time. This allowed it to compete more effectively in tablets, hybrids, and micro-servers while maintaining low power consumption. Its four SoC families covered a broad range of markets from smartphones to network infrastructure. However, the microarchitecture's legacy is also marked by quality issues. Intel revealed in its Q4 2016 quarterly report that the C2000 product family (Avoton) had a defect in the chip's LPC clock, causing systems to fail to boot or cease operation; a new C0 stepping corrected the bug in April 2017. A similar issue affected the Atom E3800 series (Bay Trail) and other Bay Trail processors, involving LPC, USB, and SD card circuitry degradation. Cisco stated failures could occur as early as 18 months of use, with higher failure rates after 36 months. Mitigations included firmware updates and usage limits. Additionally, Bay Trail CPUs experienced random freezes on Linux kernels, with a workaround that increased power usage. The 14 nm Airmont architecture also suffered from LPC, SD card, and RTC circuitry degradation, with Intel not planning a new stepping for Braswell. These issues tempered Silvermont's otherwise notable technical achievement.

Did You Know?

• Silvermont was the first Atom processor to feature out-of-order execution, replacing Hyper Threading.
• The C2000 product family had a defect in the LPC clock that could cause systems to fail to boot or cease operation; a new C0 stepping was released in April 2017.
• Bay Trail CPUs experienced random freezes on Linux kernels; a workaround involved setting the kernel flag intel_idle.max_cstate=1.