Granite Rapids
Intel's 6th-gen Xeon with up to 128 P-cores for HPC.
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Granite Rapids is the codename for Intel's sixth-generation Xeon Scalable server processors, which arrived on September 24, 2024. These chips are built for high-performance computing and pack up to 128 performance cores (P-cores) based on the Redwood Cove architecture. They were preceded in June 2024 by the platform-equivalent Sierra Forest processors, which offer up to 288 efficiency cores (E-cores) for cloud workloads.
Intel first announced on February 17, 2022, that future Xeon generations would split into two separate tracks: one using only P-cores for high-performance computing, and another using only E-cores for cloud customers who value core density, energy efficiency, and performance in heavily multi-threaded tasks over strong single-threaded performance. The fourth-generation Xeon processors, codenamed Sapphire Rapids, launched on January 10, 2023. They were Intel's first server chips to use a disaggregated multi-chip module (MCM) approach and included in-silicon accelerators, but they arrived late and topped out at 60 cores—far behind AMD's 96-core Epyc 9654. The fifth-generation Emerald Rapids followed quickly on December 14, 2023, offering socket compatibility with Sapphire Rapids systems, significantly more L3 cache, and a maximum core count of 64.
At the Hot Chips conference on August 28, 2023, Intel shared architectural details for both Granite Rapids and Sierra Forest. On September 6, 2023, a video on packaging techniques revealed a Granite Rapids package with five dies on a single substrate. During Intel's Vision event in April 2024, the company retired the Xeon Scalable branding introduced in 2017 in favor of a simpler "Xeon 6" brand for these sixth-generation processors, putting more emphasis on generation numbers. The Xeon badge was also redesigned to match the look of Intel's Core Ultra badges from 2023.
Granite Rapids processors are x86 chips using Intel's Redwood Cove P-core architecture. The dies are connected via Intel's Embedded Multi-die Interconnect Bridge (EMIB) packaging, an alternative to TSMC's Infinity Fan-Out (InFO) technique. Instead of a traditional silicon interposer, EMIB embeds a silicon bridge within an organic substrate to link multiple dies, providing high bandwidth, low latency, and low power.
Quick Facts
- Launched
- 2024-09-24
- Designedby
- Intel
- Branding
- Xeon
- Generation
- Xeon 6
- Instructions-Set
- x86
- Instructions
- x86-64
- P-Core-Arch
- Redwood Cove
Facts from the source article.
Lore & Background
Granite Rapids was preceded by the 5th generation Emerald Rapids, which launched on December 14, 2023, and topped out at 64 cores. Intel had announced on February 17, 2022, that future Xeon generations would split into P-core and E-core tracks, with Granite Rapids representing the P-core high-performance computing track. The platform equivalent Sierra Forest, with up to 288 E-cores, launched in June 2024, before Granite Rapids.
Intel shared architectural details of Granite Rapids at the Hot Chips conference on August 28, 2023, and released a video on September 6, 2023, showing a five-die package. The processors use Intel's Embedded Multi-die Interconnect Bridge (EMIB) packaging to connect compute and I/O tiles. The compute tile houses up to 44 Redwood Cove P-cores, with some disabled for yield, and includes DDR5 memory controllers supporting up to 12 memory channels across three tiles. I/O is provided by two dies on the Intel 7 process, offering 136 PCIe 5.0 lanes and CXL 2.0 support.
Granite Rapids comes in several variants: Granite Rapids-SP (Beechnut City platform, LGA 4710 socket, up to 86 cores, 8-channel DDR5, TDP up to 350W), Granite Rapids-AP (Avenue City platform, LGA 7529 socket, up to 128 cores, 12-channel DDR5, TDP up to 550W), Granite Rapids-D (edge/networking, BGA sockets, sampling in February 2024), and Granite Rapids-WS (announced February 2, 2026, on LGA 4710).
Reader's Guide
Granite Rapids marks a significant step for Intel in the server processor market, directly addressing the core count gap with AMD's EPYC processors by offering up to 128 P-cores. Its use of the Redwood Cove architecture, first introduced in Meteor Lake mobile processors, brings increased L1 cache and AMX FP16 acceleration for AI inference. The introduction of MCR memory support allows higher memory bandwidth without requiring additional DIMM slots, addressing physical space constraints in standard server motherboards. The shift to the Xeon 6 branding simplifies the naming scheme and aligns with Intel's Core Ultra branding. Granite Rapids also brings Intel's server processors in line with AMD's EPYC by functioning as an SoC with self-booting capabilities, eliminating the need for an external PCH. The split into P-core and E-core tracks (Granite Rapids and Sierra Forest) reflects Intel's strategy to target different market segments: high-performance computing for Granite Rapids and cloud efficiency for Sierra Forest. The Granite Rapids-AP variant, with its larger LGA 7529 socket and 550W TDP, is the first time Intel has used the Advanced Performance moniker since Cascade Lake in 2019, indicating a focus on maximum performance for demanding workloads.
Did You Know?
- Granite Rapids uses Intel's EMIB packaging to connect five dies on a single substrate, avoiding a prohibitively large interposer.
- The Redwood Cove cores in Granite Rapids double the L1 instruction cache to 64 KB compared to Raptor Cove's 32 KB.
- Granite Rapids supports MCR DIMMs that can achieve DDR5-8800 speeds across 12 memory channels.
- Granite Rapids-D processors were already sampling to customers as of February 2024.
A Five-Year Odyssey
Sapphire Rapids was one of Intel's most protracted development efforts, spending more than five years in the pipeline alongside Alder Lake before finally reaching customers. The project first saw daylight at Intel's May 2019 Investor Meeting, where the company outlined plans for it to replace Ice Lake and Cooper Lake by 2021. An August 2021 Architecture Day presentation offered further architectural details but conspicuously omitted any timeline. When Pat Gelsinger took the helm as CEO, he pointed to decisions made under prior leadership as a contributing factor behind the repeated slippage. Industry analysts cited yield difficulties at the Intel 7 process node, estimating that higher core-count dies were achieving only fifty to sixty percent good-chip rates. The target date drifted from the first half of 2022 to the fourth quarter, and ultimately to early 2023. Intel did not publicly confirm the January 10, 2023 announcement date until November of the prior year. The server lineup launched on that January date, the workstation range followed on February 15, and units began shipping on March 14. By the end of 2023, Intel had moved more than one million units of the generation.
Breaking the Monolithic Mold
Sapphire Rapids marked a structural turning point for Intel's server and workstation lines: it was the first generation in either category to adopt a chiplet-based package. The family splits into two packaging strategies. Lower core-count parts use a single monolithic die, while the high-core-count XCC variant assembles four separate tiles onto one package, interconnected through 2.5D Embedded Multi-die Interconnect Bridges. Each tile is a 400-square-millimeter system-on-chip that bundles compute logic with its own I/O circuitry. A tile houses fifteen Golden Cove cores and a single UPI link, so the flagship Xeon Platinum 8490H reaches sixty cores by populating all four dies. Memory bandwidth scales with the tile count: every tile contributes two DDR5 ECC channels, and the full four-tile package can address up to eight channels, sixteen DIMMs, and four terabytes of system memory. On the I/O side, each tile exposes up to thirty-two PCIe 5.0 lanes; workstation parts in the W-3400 series can claim all 112 non-chipset lanes, whereas server SKUs are capped at eighty. The Xeon Max sub-family adds 64 GB of on-package HBM 2.0e as an L4 cache layer.
A Silicon Toolbox You Can Switch On
Beyond raw CPU throughput, Sapphire Rapids embeds a suite of dedicated ASIC accelerators that offload specific workload classes from the general-purpose cores. The Data Streaming Accelerator speeds up copies and transformations between storage tiers; QuickAssist Technology handles compression and encryption; the Dynamic Load Balancer manages packet prioritization and queue steering; and the In-Memory Analytics Accelerator targets in-memory databases and big-data pipelines. A fifth technology, In-Field Scan, lets operators probe the silicon for latent hardware faults without pulling the processor offline. Not every SKU ships with every accelerator enabled. Intel introduced a licensing model called Software Defined Silicon, also branded Intel On Demand, under which a physically present accelerator can remain dormant until the customer purchases a one-time or subscription license and the operating system loads the appropriate driver. Linux gained that driver support in kernel version 6.2. At the instruction-set level, the cores add AVX512-FP16, Advanced Matrix Extensions, Trust Domain Extensions for hardware-isolated virtual machines, User Interrupts that bypass the kernel, and CET shadow-stack protection.
From Data Centers to Exascale
Sapphire Rapids slots into Intel's Eagle Stream server platform and is designed to scale from a single socket up to eight-socket configurations, giving system builders a wide performance envelope. In the server space, its sixty-core ceiling places it in direct competition with AMD's Epyc Genoa line at up to 96 cores and the higher-density Bergamo at up to 128 cores. The workstation division, labeled Xeon w3 through w9 in a tiering scheme reminiscent of consumer Core branding, faces AMD's Threadripper PRO 5000WX Chagall at up to 64 cores. The platform's I/O stack includes PCIe 5.0, Direct Media Interface 4.0, and Compute Express Link 1.1, alongside eight-channel DDR5 ECC memory running at up to 4800 MT/s. Perhaps the most visible real-world deployment is Aurora, the exascale supercomputer at Argonne National Laboratory in the United States, which is powered by this generation of Xeon processors. The breadth of workload-specific SKUs—targeting cloud, storage, network, media transcoding, and liquid-cooled configurations—reflects Intel's intent to cover the full spectrum of data-center and high-performance computing use cases under one architectural umbrella.
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Frequently Asked Questions
What is Granite Rapids?
Granite Rapids is the codename Intel uses for its sixth-generation Xeon Scalable server line, specifically the performance-core track aimed squarely at high-performance computing workloads. It hit the market on September 24, 2024, as the P-core counterpart to the efficiency-focused Sierra Forest chips that shipped a few weeks earlier in June.
How many cores does Granite Rapids offer and what architecture do they use?
The top-of-line Granite Rapids parts carry up to 128 performance cores, each built on Intel's Redwood Cove microarchitecture and fabricated on the Intel 3 process node. Every core gets 112 KB of L1 cache (split 64 KB for instructions and 48 KB for data) plus a generous 2 MB of dedicated L2 cache.
Why did Intel split Xeon into two separate tracks starting with this generation?
Back in February 2022 Intel announced it would stop mixing core types on a single Xeon die and instead offer two dedicated product lines: a P-core track (Granite Rapids) tuned for compute-intensive HPC tasks and an E-core track (Sierra Forest) optimized for dense, cloud-style throughput. The split lets each chip be architected around a single workload profile rather than a compromise.
What memory does Granite Rapids support?
Out of the box the platform runs DDR5-6400, and by using MCR (Multi-Channel Rank) DIMMs you can push effective bandwidth up to DDR5-8800. That headroom matters for HPC workloads where memory bandwidth is often the first bottleneck.
How does Granite Rapids compare to AMD's server offerings?
Granite Rapids competes in the high-core-count, high-clock HPC segment against AMD's EPYC (Zen-based) server parts, but Intel differentiates by pairing a maximum of 128 P-cores with its own Redwood Cove microarchitecture and the Intel 3 process, while AMD leans on larger core counts with its own Zen designs. The two camps target similar HPC and data-center buyers, so the choice often comes down to software ecosystem, memory bandwidth, and per-core performance trade-offs.
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