Graphics Hardware, Part 2 Codexery

SGI VPro

SGI's Odyssey-based graphics architecture for workstations and visualization systems.

SGI VPro

The SGI VPro, also called Odyssey, was a graphics architecture used in Silicon Graphics workstations. It debuted on the Octane2 and later appeared in the Fuel, Tezro, and Onyx visualization systems, where it was marketed as InfinitePerformance. The architecture offered per-pixel lighting (phong shading) via the SGIX_fragment_lighting extension and supported 48-bit RGBA color. However, later VPro implementations suffered from limited bandwidth and weaker texture mapping performance compared to rival GPUs, which quickly caught up to SGI in the market.

There were four Odyssey-based VPro board revisions: V6, V8, V10, and V12. The V6 and V8 came first, with 32MB and 128MB of RAM, respectively. The V10 and V12 doubled geometry performance over the earlier models but were otherwise similar. The V6 and V10 could allocate up to 8MB of RAM for textures, while the V8 and V12 could use up to 108MB. The V10 and V12 boards used in Fuel, Tezro, and Onyx 3000 systems had a different XIO connector than those in Octane2 workstations.

The VPro graphics subsystem relied on a proprietary SGI chipset, which included the buzz ASIC, the pixel blaster and jammer (PB&J) ASIC, and SDRAM. The buzz ASIC operated at 251 MHz, contained on-chip SRAM, and functioned as a single-chip graphics pipeline. It had three interfaces: a 16-bit, 400-MHz peer-to-peer XIO host link; an SDRAM interface (32MB for V6/V10, 128MB for V8/V12, with a memory bus running at half the buzz ASIC’s speed); and a connection to the PB&J ASIC.

Following a patent infringement settlement, SGI acquired rights to some Nvidia Quadro GPUs and released VPro-branded products (V3, VR3, V7, and VR7) based on the GeForce 256, Quadro, Quadro 2 MXR, and Quadro 2 Pro. These cards shared nothing with the original Odyssey line and were incompatible with SGI MIPS workstations. All VPro boards supported the OpenGL ARB imaging extensions, enabling hardware acceleration of many imaging operations in real time.

Quick Facts

Designfirm
Silicon Graphics
Codename
Odyssey
Entry
V6
Midrange
V10
Highend
V8
Enthusiast
V12
Predecessor
IMPACT
Support Status
Unsupported

Facts from the source article.

Lore & Background

The VPro architecture consists of an SGI proprietary chipset including the buzz ASIC, the pixel blaster and jammer (PB&J) ASIC, and associated SDRAM. The buzz ASIC is a single-chip graphics pipeline operating at 251 MHz with on-chip SRAM, and has three interfaces: a 16-bit, 400-MHz peer-to-peer XIO host link; an SDRAM interface (32 MB for V6/V10, 128 MB for V8/V12, running at half the buzz speed); and a PB&J ASIC interface. Four Odyssey-based VPro board revisions existed: V6 and V8 (with 32MB and 128MB RAM respectively), and V10 and V12 (with double the geometry performance of the older V6/V8, but otherwise similar). The V6 and V10 can have up to 8MB RAM allocated to textures, while V8 and V12 can have up to 108MB RAM used for textures. The V10 and V12 boards used in Fuel, Tezro and Onyx 3000 computers use a different XIO connector than the cards used in Octane2 workstations.

Reader's Guide

The VPro architecture is notable for introducing per-pixel lighting (phong shading) via the SGIX_fragment_lighting extension and supporting 48-bit RGBA color, capabilities that were advanced for their time. However, the article notes that later VPro designs suffered from constrained bandwidth and poorer texture mapping performance compared to competing GPU solutions, which rapidly caught up to SGI in the market. As a result of a patent infringement settlement, SGI acquired rights to some Nvidia Quadro GPUs and released VPro-branded products (V3, VR3, V7, VR7) based on the GeForce 256, Quadro, Quadro 2 MXR, and Quadro 2 Pro, but these share nothing with the original Odyssey line and could not be used in SGI MIPS workstations. All VPro boards support the OpenGL ARB imaging extensions, enabling hardware acceleration of numerous imaging operations at real-time rates.

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