IMPACT (computer graphics)

Lore & Background

IMPACT graphics consists of five subsystems: the Command Engine, Geometry Subsystem, Raster Engine, framebuffer, and Display Subsystem. Systems include either one or two Geometry Engines and one or two Raster Engines. It was available as a high-end graphics option on SGI workstations released during the mid-1990s.

IMPACT graphics subsystems come in three configurations for the SGI Indigo2 IMPACT workstation: Solid IMPACT, High IMPACT, and Maximum IMPACT. Equivalent configurations exist for the SGI Octane workstation, referred to as SI, SSI, and MXI (I-series). Later Octane workstations used updated ASIC chips and are referred to as SE, SSE, and MXE (E-series).

The architecture was superseded by SGI's VPro graphics architecture in 1997.

Reader's Guide

IMPACT graphics architecture was significant as a high-end option for Silicon Graphics workstations in the mid-1990s, providing real-time 2D and 3D rendering that rivaled even later high-end PCs. Its modular design, with one or two Geometry Engines and one or two Raster Engines, allowed flexible configurations across the Indigo2 IMPACT and Octane workstations. The use of Rambus RDRAM for texture memory was a distinctive technical choice. The architecture's legacy includes its influence on SGI's subsequent VPro graphics, which superseded it in 1997. The article notes that IMPACT's rendering capability was comparable to that of high-end PCs made well after its introduction, underscoring its forward-looking performance at the time.

The Memory Wall That Shaped an Era

In the earliest days of computer graphics, engineers faced a stubborn physical limitation: the memory chips available at the time simply could not push data out quickly enough to paint a full picture onto a television or monitor from a single large framebuffer. The planar arrangement was born as a practical workaround to this bottleneck. Rather than storing every bit that describes one pixel in a single contiguous block of RAM, the data was divided across several separate bitplanes, each residing on its own memory chip. Because these chips could be read simultaneously at a reduced individual speed, the aggregate bandwidth was sufficient to drive a display even on modest hardware. This approach powered the color graphical modes of the EGA video adapter found in early IBM PC machines, and it underpinned the graphics of third- and fourth-generation game consoles as well as home computers throughout the 1980s. The later VGA standard retained only a single non-planar mode, a design choice that traded memory efficiency for simpler access patterns, effectively acknowledging that the planar model had served its purpose in the transition to faster memory technologies.

A Legacy Written in Silicon

The planar model left its fingerprint on an extraordinary range of machines. Among game consoles, Sega's Master System and Game Gear, Nintendo's NES and SNES, and the PC Engine all relied on planar display organization. In the home-computer world, the 16-bit Atari ST and Amiga platforms of the 1980s and 1990s were built exclusively around planar graphics, paired with a powerful blitter for fast screen manipulation. The Amiga's original OCS chipset operated with five bitplanes, yielding 32 colors per pixel, while the later AGA chipset extended that to eight planes and 256 colors. The Slovak PP 01 offered a 24 KB plane-based mode supporting eight colors at 256×256 resolution. Even in the modern era, the spirit of planar design persists: the HGFX graphics expansion, first developed for the ZX Spectrum family in 2019 and realized in FPGA hardware by 2022, uses eight bitplanes to deliver 256 indexed colors, a truecolour palette, dual video buffers, and HDMI output—all while occupying just 6,144 bytes of the original video RAM. It now ships as part of the MB03+ Ultimate interface and the eLeMeNt ZX computer.

Two Bytes, Two Philosophies

A useful way to understand planar arrangement is to contrast it directly with a packed-pixel layout. In a chunky four-bits-per-pixel display using an RGBI palette, each byte encodes two pixels and offers sixteen colors per pixel. A planar scheme with two bitplanes, by contrast, spreads eight pixels across the same two bytes but non-contiguously, providing only four colors. The trade-off is clear: the packed example stores fewer pixels in the same memory but with a richer palette, while the planar example covers more pixels with fewer colors. Adding planes scales the color count exponentially—four planes yield sixteen colors but require four bytes for those same eight pixels, making memory usage and color depth equivalent to the packed example. Crucially, the planar layout governs only how pixel data is positioned in memory; it does not dictate how that data is interpreted. A planar framebuffer can encode either indexed or direct color, meaning the arrangement is orthogonal to the color model in use.

Efficiency, Flexibility, and a Price in Cycles

Planar arrangements shine brightest at bit depths that do not divide evenly into bytes. Supporting exactly three bits per pixel, for instance, is straightforward with three planes. A packed layout, however, must either let pixels straddle byte boundaries—complicating addressing and unpacking—or pad each byte with unused bits, wasting space. This historical pressure is one reason packed-pixel systems gravitated toward bit depths that fit neatly into bytes. Another major advantage is the ease of switching bit depths: planes can simply be added or discarded, and if colors are indexed, the palette is extended or truncated. This means higher-resolution color support can be introduced with minimal disruption to older software, and elements rendered at different bit depths can coexist on the same screen without complex conversion. The principal drawback is that scrolling and animation demand more RAM address cycles than a packed layout would, since the hardware must reach into multiple planes to reconstruct each pixel's full color information.