MOS Technology 8568
80-column RGBI controller for the Commodore 128DCR.
The MOS Technology 8568 Video Display Controller (VDC) handled the 80-column and RGBI display for the Commodore 128DCR personal computer. The Commodore 128 service manual called it the "80 column CRT controller." It built on the older 6545E monochrome CRT controller, adding RGBI color capability.
The 8568 offered an 80×25 character text resolution and a maximum video resolution of 720×700 pixels. It supported interlaced modes up to 80×50 text and 640H×480V bitmap. Three character modes were available: standard, semigraphic, and graphic, along with double-width and high-resolution bitmap options. Its output was digital RGBI with 16 colors or 16 gray shades, plus limited monochrome composite. Other features included interlace mode, horizontal and vertical scrolling, light pen input, a hardware cursor, underline, blink, reverse video, two character sets of 256 each, and an update-ready interrupt. The chip could access 64 KB of memory, programmable to interface with either 4164/4464 or 4416 DRAM. It had 48 pins and ran on a +5 Volt DC supply.
The original "flat" Commodore 128 and the European plastic-housing Commodore 128D used the 8563 video controller instead. The 8568 was essentially an updated 8563, integrating glue logic that had previously been separate discrete components. Unlike the 8563, the 8568 included an active-low interrupt request line (/INTR), unused in the C-128, which asserted when the "ready" bit in its status register changed from 0 to 1; reading the control register would de-assert it. Due to different pin assignments and circuit interfacing, the 8563 and 8568 were not electrically interchangeable.
The Commodore 128 had two video display modes, typically used one at a time but usable simultaneously with two compatible monitors. The VIC-II chip, also found in the Commodore 64, was memory-mapped directly into main memory, sharing 128 kB RAM with the CPUs. The 8568, however, had its own local video RAM—64K in the North American C-128DCR model, and either 16 or 64K in the European C-128D model depending on manufacture date. Addressing the 8568's internal registers and dedicated video memory required an indirect process: the program first told the VDC which of its 37 internal registers to access, then waited until the VDC was ready before performing a read or write.
- Maximum video resolution
- 720 × 700 pixels
- Text resolution
- 80 × 25 characters
- Interlaced modes
- up to 80 × 50 text, 640H × 480V bitmap
- Colors
- 16 colors or 16 gray shades via digital RGBI, plus limited monochrome composite
- Memory access
- 64 KB, programmable to interface either 4164/4464 or 4416 DRAM
- Pin count
- 48
- Supply voltage
- +5 Volt DC
Lore & Background
The 8568 was essentially an updated version of the 8563, combining the latter's functionality with glue logic that had previously been implemented using discrete components located near the 8563. Unlike the 8563, the 8568 included an unused (in the C-128) active low interrupt request line (/INTR), which was asserted when the 'ready' bit in the 8568's status register changed from 0 to 1. Reading the control register would automatically de-assert /INTR. Due to differences in pin assignments and circuit interfacing, the 8563 and 8568 are not electrically interchangeable.
Unlike the VIC-II chip, the 8568 had its own local video RAM, 64K in the C-128DCR model (sold in North America) and, depending on the date of manufacture of the particular machine, either 16 or 64K in the C-128D model (marketed in Europe). Addressing the VDC's internal registers and dedicated video memory must be accomplished by indirect means: first, the program must tell the VDC which of its 37 internal registers is to be accessed, then wait until the VDC is ready for access, after which a read or write on the selected internal register may be performed. Owing to this somewhat cumbersome method of controlling the 8568, the maximum possible frame rate in bit-mapped mode is generally too slow for arcade-style action video games.
Reader's Guide
The 8568's significance lies in its role as the 80-column display generator for the Commodore 128DCR, providing a higher-resolution text and graphics output compared to the VIC-II's 40-column display. Its design as an updated 8563 integrated glue logic that previously required discrete components, simplifying the circuit board. The 8568's indirect register access method, while functional, limited its performance in bit-mapped modes, making it unsuitable for fast-paced arcade games. The inclusion of an interrupt line (/INTR) that was unused in the C-128 suggests potential for more advanced applications. The final versions with revision codes R9a or R9b indicated undocumented improvements. The 8568's memory could be configured with different DRAM types, and its video RAM size varied by model and manufacture date. The 8563 and 8568 are not electrically interchangeable, marking a distinct hardware revision.
Did You Know?
- The 8568 was referred to as the '80 column CRT controller' in the Commodore 128 service manual.
- The 8568 included an unused active low interrupt request line (/INTR) in the C-128.
- The 8568 could access 64 KB of memory, programmable to interface either 4164/4464 or 4416 DRAM.
- The final versions of the 8568 had revision codes R9a or R9b, indicating undocumented improvements.
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