PC Hardware, Part 3 Codexery

Complex programmable logic device

CPLD bridges PAL and FPGA with non-volatile memory.

Complex programmable logic device

A complex programmable logic device (CPLD) sits between programmable array logic (PAL) and field-programmable gate arrays (FPGA) in complexity, borrowing architectural traits from both. Its core component is the macrocell, which handles logic in disjunctive normal form along with other specialized operations.

CPLDs share several traits with PALs. They use non-volatile configuration memory, so they start working immediately when powered on, unlike many FPGAs that need an external configuration ROM. In older CPLD models, routing typically forces most logic blocks to connect directly to external pins, limiting internal state storage and deep logic layers; however, this restriction rarely applies to larger or newer CPLD families.

Other features align with FPGAs. CPLDs offer thousands to tens of thousands of logic gates, enough for moderately complex data processing—far more than PALs (a few hundred gates) but less than FPGAs (tens of thousands to millions). They also support more flexible logic than simple sum-of-product expressions, including complex feedback paths between macrocells and specialized circuits for common functions like integer arithmetic.

The clearest difference between a large CPLD and a small FPGA is the CPLD’s on-chip non-volatile memory. This lets CPLDs handle boot-loader tasks, starting up and then handing control to other devices that lack permanent program storage. For instance, a CPLD can load configuration data for an FPGA from non-volatile memory.

CPLDs evolved from earlier, smaller devices: programmable logic arrays (PLA, first shipped by Signetics) and PALs. Those, in turn, came from standard logic products, which had no programmability and required physically wiring together many standard logic chips on a circuit board or with wire wrap for prototyping. Architecturally, CPLDs are built from a collection of PLDs linked by a programmable interconnection structure, whereas FPGAs use logic blocks.

Logic gate equivalent range
thousands to tens of thousands
Predecessor devices
programmable logic arrays (PLA) and PALs
Common feature with pals
non-volatile configuration memory
Common feature with fpgas
large number of gates available

Lore & Background

CPLDs were an evolutionary step from even smaller devices that preceded them: programmable logic arrays (PLA) (first shipped by Signetics) and PALs. These in turn were preceded by standard logic products, which offered no programmability and were used to build logic functions by physically wiring several standard logic chips together, usually on a printed circuit board or boards, but sometimes using wire wrap wiring for prototyping.

Some CPLD features are in common with PALs, including non-volatile configuration memory, which allows the CPLD to function immediately on system start-up without an external configuration ROM. For many legacy CPLD devices, routing constrains most logic blocks to have input and output signals connected to external pins, reducing opportunities for internal state storage and deeply layered logic, though this is usually not a factor for larger CPLDs and newer product families.

Other features are in common with FPGAs, such as a large number of gates available—typically the equivalent of thousands to tens of thousands of logic gates—allowing implementation of moderately complicated data processing devices. CPLDs also provide some provisions for logic more flexible than sum-of-product expressions, including complicated feedback paths between macro cells and specialized logic for implementing various commonly used functions, such as integer arithmetic.

Reader's Guide

The most noticeable difference between a large CPLD and a small FPGA is the presence of on-chip non-volatile memory in the CPLD, which allows CPLDs to be used for 'boot loader' functions, before handing over control to other devices not having their own permanent program storage. A good example is where a CPLD is used to load configuration data for an FPGA from non-volatile memory. The main distinction between FPGA and CPLD device architectures is that CPLDs are internally based on a collection of PLDs accompanied by a programmable interconnection structure, while FPGAs use logic blocks. CPLDs thus occupy a middle ground in programmable logic, offering the instant-on capability and non-volatility of PALs while providing the gate count and flexibility approaching that of FPGAs. Their legacy includes serving as a bridge between simpler programmable logic and more complex field-programmable gate arrays, and they remain relevant for applications requiring immediate operation at power-up.

Did You Know?

Birth in the Automotive Shop

The story of the PLC begins in 1968 when GM Hydramatic, General Motors' automatic transmission division, issued a request for proposals seeking an electronic alternative to hard-wired relay systems. This initiative stemmed from a white paper authored by engineer Edward R. Clark. The winning bid came from Bedford Associates, a firm based in Bedford, Massachusetts. Their deliverable, completed in 1969, was designated the 084 simply because it represented the company's eighty-fourth project. Bedford Associates subsequently founded Modicon, Inc., a dedicated enterprise for developing, manufacturing, and servicing this new category of controller. The name Modicon itself was an abbreviation for "modular digital controller." Dick Morley, who worked on the project, is widely regarded as the father of the PLC. One of the original 084 units built still sits on display at Schneider Electric's North Andover, Massachusetts facility, having been gifted by GM after nearly two decades of continuous industrial service.

Replacing the Relay Maze

Before the PLC arrived, industrial automation relied heavily on relays, cam timers, drum sequencers, and dedicated closed-loop controllers. The hard-wired architecture of these components made any modification to a manufacturing process a laborious undertaking. Engineers had to physically rewire circuits and meticulously update documentation, while troubleshooting remained equally tedious. When general-purpose computers first entered the picture, they proved unreliable in factory settings and demanded specialist programmers along with tightly controlled environmental conditions regarding temperature, cleanliness, and power quality. The PLC addressed these shortcomings directly. It was engineered to withstand the harsh realities of an industrial floor far better than office-grade computing equipment. Compared to relay assemblies, it was more compact, required less maintenance, and could be expanded simply by adding I/O modules. Perhaps most transformative was the ability to reconfigure an entire control system by loading new or modified code rather than rewiring hardware. Early programming used ladder logic, a notation that closely mirrored relay schematic diagrams, making the transition intuitive for electricians accustomed to the old technology.

Two Fathers, One Acronym

The narrative of the PLC's creation involves two figures who are each sometimes called its father. Dick Morley, working with Bedford Associates, delivered the Modicon 084 for General Motors in 1969. In a parallel development, Odo Josef Struger was instrumental in creating the Allen-Bradley programmable logic controller. Before the IBM Personal Computer hit the market in 1981, these industrial devices were commonly referred to simply as "Programmable Controllers" or "PCs." The explosive growth of the personal computer industry in the early 1980s made that abbreviation universally associated with desktop machines. Struger is credited with coining the term "PLC" to distinguish the two, and the word "Logic" was a natural inclusion given that ladder logic was already the established name for the programming paradigm. Allen-Bradley, now a Rockwell Automation brand, grew into the dominant PLC manufacturer in the United States during Struger's tenure. His PLC-5 family, preceded by the 1774-PLC released in the 1980s, introduced the first modular design that would define modern systems. Struger also played a leadership role in shaping the IEC 61131-3 programming language standards.

From Factory Floor to the Cloud

The PLC's influence extends well beyond its original automotive origins. Modicon, which was the most popular full-featured PLC through the early 1980s, eventually sold its brand to Gould Electronics in 1977, and it later passed to Schneider Electric, its current owner. Around the same period, Modicon created Modbus, a data communications protocol for connecting its controllers. Modbus has since evolved into a widely adopted open standard used to link diverse industrial electrical devices. The Modicon 84 designation persisted at the tail end of product lines, appearing in names like Modicon Micro 84 and Modicon TSX CSY 84, until the 984 model arrived. In the modern era, virtual PLCs have broadened the technology's reach. These software-based controllers replicate the functions of traditional hardware units but run on general-purpose computing platforms, eliminating the need for dedicated industrial hardware. They are particularly suited to simulation, remote control, and cloud-based automation management. Meanwhile, the fundamental requirement that PLCs operate as hard real-time systems—producing outputs within strict time windows to prevent unintended machine operations—remains unchanged, with programs typically stored in battery-backed or non-volatile memory.

Frequently Asked Questions

What is a CPLD and where does it fit in the logic-device family?

A CPLD is a programmable logic chip that occupies the middle tier between simpler PALs and more complex FPGAs, borrowing architectural ideas from both. It gives designers more gate-level flexibility than a PAL while retaining the simpler configuration model that FPGAs have largely moved away from.

Why does a CPLD start working the instant you power it on?

CPLDs store their logic configuration in non-volatile memory, a trait they share with older PALs. Unlike many FPGAs, which must first load a bitstream from an external configuration ROM, a CPLD is ready to operate the moment power is applied.

What is a macrocell and why is it central to CPLD design?

The macrocell is the fundamental logic building block inside a CPLD. It evaluates expressions in disjunctive normal form and also handles other specialized operations, making it the unit through which all routing and logic functions are realized.

How many logic gates can a CPLD typically provide?

A CPLD generally offers a range of thousands to tens of thousands of equivalent logic gates. That count sits comfortably above what a PAL can deliver but well below the gate densities found in FPGAs.

What predecessor devices led to the CPLD?

CPLDs evolved from the programmable logic arrays (PLA) and PALs that came before them. They inherited the non-volatile configuration approach from those earlier devices while adding the larger gate counts and routing flexibility that FPGAs would later push even further.

More in PC Hardware, Part 3 1-24

Spotted an error? Know more?

Reader corrections go straight into our review queue. Suggest an edit · How this site is sourced

Comments

Loading…
Open in the interactive codex →