Logic Gate
The dominant fabrication process for modern integrated circuits.
Complementary metal–oxide–semiconductor (CMOS) is a type of MOSFET fabrication process that uses complementary and symmetrical pairs of p-type and n-type MOSFETs for logic functions. CMOS technology is used for constructing integrated circuit chips, including microprocessors, microcontrollers, memory chips, and other digital logic circuits. CMOS overtook NMOS logic as the dominant MOSFET fabrication process for VLSI chips in the 1980s, replacing earlier TTL technology at the same time. As of 2011, 99% of IC chips were fabricated using CMOS technology.
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Verified Timeline
Lore & Background
The CMOS process was presented by Fairchild Semiconductor's Frank Wanlass and Chih-Tang Sah at the International Solid-State Circuits Conference in 1963. Wanlass later filed US patent 3,356,858 for CMOS circuitry, granted in 1967. RCA commercialized the technology with the trademark 'COS-MOS' in the late 1960s, forcing other manufacturers to find another name, leading to 'CMOS' becoming the standard by the early 1970s. Two important characteristics of CMOS devices are high noise immunity and low static power consumption. Since one transistor of the MOSFET pair is always off, the series combination draws significant power only momentarily during switching. Consequently, CMOS devices do not produce as much waste heat as other forms of logic like NMOS or TTL, which normally have some standing current even when not changing state. These characteristics allow CMOS to integrate a high density of logic functions on a chip, which is why it became the most widely used technology for VLSI chips.
In Their Own Story
In 1948, John Bardeen and Walter Brattain patented an insulated-gate transistor with an inversion layer, which forms the basis of CMOS technology today. The principle of complementary symmetry was first introduced by George Sziklai in 1953. Paul Weimer at RCA invented thin-film transistor complementary circuits in 1962, including complementary flip-flop and inverter circuits. Frank Wanlass was familiar with Weimer's work. In 1955, Carl Frosch and Lincoln Derick accidentally grew a layer of silicon dioxide over a silicon wafer, observing surface passivation effects. By 1957, they manufactured silicon transistors using masking and predeposition. J.R. Ligenza and W.G. Spitzer studied thermally grown oxides and fabricated a high quality Si/SiO2 stack in 1960. Following this, Mohamed Atalla and Dawon Kahng proposed a silicon MOS transistor in 1959 and demonstrated a working MOS device with their Bell Labs team in 1960. CMOS was commercialized by RCA in the late 1960s, developing circuits for an Air Force computer in 1965 and a 288-bit CMOS SRAM memory chip in 1968. RCA also used CMOS for its 4000-series integrated circuits in 1968, starting with a 20 μm process. CMOS was initially overlooked by the American semiconductor industry in favor of NMOS, but was quickly adopted by Japanese manufacturers due to its low power consumption. Toshiba developed C2MOS in 1969, using it for an LSI chip for Sharp's Elsi Mini LED pocket calculator in 1971. Suwa Seikosha began developing a CMOS IC for a Seiko quartz watch in 1969, mass-producing it with the Seiko Analog Quartz 38SQW watch in 1971. The first mass-produced CMOS consumer electronic product was the Hamilton Pulsar 'Wrist Computer' digital watch in 1970. The earliest microprocessors in the early 1970s were PMOS processors. CMOS microprocessors were introduced in 1975 with the Intersil 6100 and RCA CDP 1801, but did not become dominant until the 1980s. In 1978, a Hitachi team led by Toshiaki Masuhara introduced the twin-well Hi-CMOS process with the HM6147 4 kb SRAM memory chip, manufactured with a 3 μm process. The HM6147 matched the performance of the Intel 2147 HMOS chip (55/70 ns access) while consuming significantly less power (15 mA vs 110 mA). This twin-well CMOS process eventually overtook NMOS as the most common semiconductor manufacturing process for computers in the 1980s. Intel introduced a 1.5 μm CMOS process in 1983. In the mid-1980s, Bijan Davari of IBM developed high-performance, low-voltage, deep sub-micron CMOS technology. In 1988, Davari led an IBM team that demonstrated a high-performance 250 nanometer CMOS process. Fujitsu commercialized a 700 nm CMOS process in 1987, and Hitachi, Mitsubishi Electric, NEC and Toshiba commercialized 500 nm CMOS in 1989. Sony commercialized a 350 nm CMOS process in 1993, while Hitachi and NEC commercialized 250 nm CMOS. Hitachi introduced a 160 nm CMOS process in 1995, Mitsubishi introduced 150 nm CMOS in 1996, and Samsung Electronics introduced 140 nm in 1999. In 2000, Gurtej Singh Sandhu and Trung T. Doan at Micron Technology invented atomic layer deposition high-κ dielectric films, leading to a cost-effective 90 nm CMOS process. Toshiba and Sony developed a 65 nm CMOS process in 2002, and TSMC initiated development of 45 nm CMOS logic in 2004. The development of pitch double patterning by Gurtej Singh Sandhu at Micron Technology led to 30 nm class CMOS in the 2000s. As of 2019, planar CMOS technology is still the most common form of semiconductor device fabrication, but is gradually being replaced by non-planar FinFET technology for nodes smaller than 20 nm.
Reader's Guide
CMOS technology is used for constructing integrated circuit chips including microprocessors, microcontrollers, memory chips, and other digital logic circuits. It is also used for analog circuits such as image sensors (CMOS sensors), data converters, RF circuits (RF CMOS), and highly integrated transceivers for many types of communication. The phrase 'metal–oxide–semiconductor' refers to the physical structure of MOS field-effect transistors, having a metal gate electrode placed on top of an oxide insulator, which in turn is on top of a semiconductor material. Aluminium was once used but now the material is polysilicon. Other metal gates have made a comeback with the advent of high-κ dielectric materials in the CMOS process, as announced by IBM and Intel for the 45 nanometer node and smaller sizes. CMOS technology was initially slower than NMOS logic, so NMOS was more widely used for computers in the 1970s. The Intel 5101 (1 kb SRAM) CMOS memory chip (1974) had an access time of 800 ns, whereas the fastest NMOS chip at the time, the Intel 2147 (4 kb SRAM) HMOS memory chip (1976), had an access time of 55/70 ns. However, the Hitachi HM6147 (4 kb SRAM) chip in 1978 matched the performance of the Intel 2147 while consuming significantly less power. With comparable performance and much less power consumption, CMOS eventually overtook NMOS as the most common semiconductor manufacturing process for computers in the 1980s. As of 2010, CPUs with the best performance per watt each year have been CMOS static logic since 1976.
Did You Know?
- The CMOS process was presented by Frank Wanlass and Chih-Tang Sah at the International Solid-State Circuits Conference in 1963.
- RCA commercialized CMOS under the trademark 'COS-MOS' in the late 1960s, forcing other manufacturers to find another name.
- The first mass-produced CMOS consumer electronic product was the Hamilton Pulsar 'Wrist Computer' digital watch, released in 1970.
- In 1978, Hitachi's HM6147 4 kb SRAM chip matched the performance of Intel's fastest NMOS chip while consuming only 15 mA compared to 110 mA.
- As of 2011, 99% of IC chips were fabricated using CMOS technology.
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