Texture mapping unit
GPU component that maps textures onto 3D geometry.
A texture mapping unit (TMU) is a part of modern GPUs that handles the rotation, resizing, and distortion of a bitmap image so it can be applied as a texture onto any flat surface of a 3D model. This process is called texture mapping. Today, the TMU exists as a distinct stage within the graphics pipeline, but when it first appeared—for instance, on the Voodoo2 card—it was a separate processor.
The TMU was developed because sampling and transforming a flat texture map to match the correct angle and perspective in 3D space requires heavy computation, specifically a large matrix multiply. Early CPUs, like the Pentium, could not handle this workload fast enough.
By 2013, TMUs had become part of the shader pipeline and were no longer tied directly to the Render Output Pipelines (ROPs). In AMD's Cypress GPU, for example, each of the 20 shader pipelines contains four TMUs, totaling 80 TMUs. Chip designers do this to keep shaders and their texture engines closely linked.
A 3D scene consists of geometry and the textures that cover it. Texture units take a texture and map it onto geometry, wrapping it around the shape to produce textured pixels for the screen. Textures can be actual images, lightmaps, or normal maps used for advanced surface lighting.
Texture fill rate measures how quickly a graphics card can perform texture mapping. Although pixel shader processing has grown in importance, this metric still matters. A clear example is the X1600 XT, which has a 3-to-1 ratio of pixel shader processors to TMUs. This ratio caused it to perform worse than comparable GPUs of its era, like Nvidia's 7600GT. In mid-range cards, texture mapping can still be a bottleneck. At the high end, however, the X1900 XTX has the same 3-to-1 ratio but performs well because screen resolutions max out and it has ample texture mapping power.
TMUs handle texture addressing and filtering, working alongside pixel and vertex shader units. Their job is to apply texture operations to pixels. When comparing two cards, the one with more TMUs is generally faster at processing texture information. Modern GPUs include Texture Address Units (TA) and Texture Filtering Units (TF) within the TMU. The TA maps texels to pixels and handles addressing modes, while the TF optionally performs hardware-based texture filtering.
- First implementation as separate process
- Voodoo2 graphics card
- Example gpu with tmu count
- AMD's Cypress GPU: 20 shader pipelines, each with 4 TMUs, total 80 TMUs
- Example ratio pixel shader processors to
- 3 to 1 (e.g., X1600 XT and X1900 XTX)
- Example pipeline architecture
- GeForce 3: 4 pixel pipelines, each with 2 TMUs
- Example early decoupled vertex shader
- ATI Radeon 9700 (R300 GPU): 4 global vertex shaders, each quad had 4 pixel shaders, 4 TMUs, 4 ROPs
Lore & Background
The TMU came about due to the compute demands of sampling and transforming a flat image (as the texture map) to the correct angle and perspective it would need to be in 3D space. The compute operation is a large matrix multiply, which CPUs of the time (early Pentiums for example) could not cope with at an acceptable level of performance. In 2013, TMUs are part of the shader pipeline and decoupled from the Render Output Pipelines (ROPs). For example, in AMD's Cypress GPU, each shader pipeline (of which there are 20) has four TMUs, giving the GPU 80 TMUs. This is done by chip designers to closely couple shaders and the texture engines they will be working with.
Texture fill rate is a measure of the speed with which a particular card can perform texture mapping. Though pixel shader processing is becoming more important, this number still holds some weight. Best example of this is the X1600 XT, which has a 3 to 1 ratio of pixel shader processors to TMUs, achieving lower performance when compared to other GPUs of the same era and class (such as nVidia's 7600GT). In the mid range, texture mapping can still very much be a bottleneck. However, at the high end, the X1900 XTX has this same 3 to 1 ratio, but does just fine because screen resolutions top out and it has more than enough texture mapping power to handle any display.
In modern GPUs, TMUs contain Texture Address Units (TA) and Texture Filtering Units (TF). Texture Address Units map texels to pixels and can perform texture addressing modes. Texture Filtering Units optionally perform hardware based texture filtering. The vertex shader had long been decoupled, starting with the R300, but the pixel shader was not so easily done, as it required colour data (e.g. texture samples) to work with, and hence needed to be closely coupled to a TMU. Said coupling remains to this day, where the shader engine, made of units able to run either vertex or pixel data, is tightly coupled to a TMU but has a crossbar dispatcher between its output and the bank of ROPs.
Reader's Guide
The texture mapping unit is a fundamental component in the graphics pipeline, responsible for the computationally intensive task of mapping textures onto 3D geometry. Its significance is rooted in the historical limitation of CPUs, which could not perform the large matrix multiplies required for texture mapping at acceptable speeds, leading to the development of dedicated TMUs. The article notes that TMUs were first implemented as separate processors, as seen on the Voodoo2 graphics card, before becoming integrated into modern GPUs as discrete pipeline stages. The number of TMUs in a GPU is a key metric for comparing texturing performance, with the assumption that more TMUs generally yield faster texture processing. However, the article highlights that the ratio of pixel shader processors to TMUs can create bottlenecks, as demonstrated by the X1600 XT's 3-to-1 ratio leading to lower performance compared to competitors. At the high end, such as the X1900 XTX, the same ratio is sufficient due to resolution limits. The TMU's role extends beyond gaming; in GPGPU, texture maps in 1, 2, or 3 dimensions may store arbitrary data, and by providing interpolation, the TMU offers a convenient means of approximating arbitrary functions with data tables. The legacy of the TMU is its enduring tight coupling with shader engines, a design choice that persists even as other pipeline components have been decoupled.
Did You Know?
- The TMU was first implemented as a separate processor, as seen on the Voodoo2 graphics card.
- In AMD's Cypress GPU, there are 80 TMUs total, with 4 TMUs per shader pipeline.
- The GeForce 3 had four pixel pipelines, each with two TMUs.
- The ATI Radeon 9700 (R300 GPU) was first to decouple vertex shaders from pixel shaders, using a 'dual core' design with quads containing 4 TMUs each.
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