PICA200
A low-power GPU IP core for embedded devices, notably in the Nintendo 3DS.
The PICA200 is a graphics processing unit (GPU) created by the Japanese startup Digital Media Professionals Inc. (DMP) for use in embedded systems like vehicle electronics, mobile phones, cameras, and game consoles. It functions as an IP core that other companies can license and integrate into their own system-on-chips (SOCs). Its most famous deployment is in the Nintendo 3DS handheld console. The GPU was first announced at SIGGRAPH 2005, and a year later at SIGGRAPH 2006, a working demo called "Mikage" was shown alongside Futuremark.
The PICA200 succeeded the ULTRAY2000, a proof-of-concept graphics workstation also shown at SIGGRAPH 2005, which was built to test DMP's low-power, fixed-function "MAESTRO" GPU design. The PICA200 itself uses the "MAESTRO-2G" architecture, supporting programmable vertex and geometry shaders alongside a fixed-function fragment stage. It is marketed as supporting OpenGL ES 1.1 with several proprietary extensions. The GPU can include up to four programmable vertex processors that work in parallel. One of these, the "primitive engine," can function as either a vertex or geometry processor, and it enables advanced operations like Catmull–Clark and Loop subdivision. Among the MAESTRO-2G extensions are per-pixel lighting, procedural texture generation, bidirectional reflectance distribution function (BRDF), Cook-Torrance specular highlights, polygon subdivision via geometry shaders, soft shadow projection, and a form of fake subsurface scattering similar to two-sided lighting.
Beyond the Nintendo 3DS, the PICA200 was also built into the NV7 3D/2D graphics LSI, a chip announced primarily for amusement equipment and later described as part of an embedded 3D graphics platform for arcade machines and digital signage. Its specifications include a 65 nm manufacturing process, a maximum clock speed of 400 MHz, theoretical pixel performance of 400 megapixels per second at 100 MHz and 800 megapixels per second at 200 MHz, and vertex performance of 40 million triangles per second at 100 MHz or 15.3 million polygons per second at 200 MHz. Power consumption ranges from 0.5 to 1.0 mW per MHz. The frame buffer supports a maximum resolution of 4095×4095 pixels, with pixel formats including RGBA4444, RGB565, RGBA5551, and RGBA8888.
- Announcement
- SIGGRAPH 2005
- Operational demo
- SIGGRAPH 2006
- Manufacturing process
- 65 nm
- Maximum clock frequency
- 400 MHz
- Pixel performance theoretical
- 400 Megapixel/s @100 MHz; 800 Megapixel/s @200 MHz
- Vertex performance theoretical
- 40Mtriangle/s @100 MHz; 15.3Mpolygon/s @200 MHz
- Power consumption
- 0.5-1.0 mW/MHz
Lore & Background
The PICA200 is the successor to the ULTRAY2000, a proof-of-concept graphics workstation presented at SIGGRAPH 2005, created to test DMP's attempts at a low-power fixed-function 'MAESTRO' GPU architecture. The PICA200 implements the 'MAESTRO-2G' architecture and supports programmable vertex shaders and geometry shaders, with a fixed-function fragment stage. It is advertised as supporting OpenGL ES 1.1 with certain proprietary extensions.
The PICA200 has up to 4 programmable vertex processors that can work in parallel. One of these processors, the 'primitive engine', can be used as either a vertex processor or a geometry processor, and allows more complex operations including Catmull–Clark subdivision and Loop subdivision. Some MAESTRO-2G extensions include per-pixel lighting, procedural texture generation, bidirectional reflectance distribution function (BRDF), Cook-Torrance specular highlights, polygon subdivision, soft shadow projection, and fake subsurface scattering.
The PICA200 was incorporated into the NV7 3D/2D graphics LSI, announced mainly for amusement equipment and later reported as part of an embedded 3D graphics platform aimed at arcade and digital-signage systems.
Reader's Guide
The PICA200's significance lies in its role as a licensable GPU IP core for embedded devices, with its most prominent application being the Nintendo 3DS portable handheld game console. The article describes it as a low-power design based on the MAESTRO-2G architecture, offering programmable vertex and geometry shaders alongside a fixed-function fragment stage. Its feature set includes per-pixel lighting, procedural texture generation, and polygon subdivision, which were advanced for embedded graphics at the time. The PICA200 also powered the NV7 LSI for amusement and arcade equipment, extending its reach beyond handheld gaming. The article notes its theoretical performance figures at various clock speeds and its support for a wide range of rendering techniques, such as shadow mapping, cel shading, and post-processing effects. Its legacy is tied to enabling 3D graphics in a power-constrained handheld console, demonstrating the viability of DMP's MAESTRO architecture for mass-market embedded devices.
Did You Know?
- The PICA200 was announced at SIGGRAPH 2005 and demonstrated with an operational demo called 'Mikage' at SIGGRAPH 2006.
- The PICA200's 'primitive engine' can perform Catmull–Clark and Loop subdivision.
- It was incorporated into the NV7 3D/2D graphics LSI for amusement equipment and arcade systems.
More in Graphics Hardware 1-24
Spotted an error? Know more?
Reader corrections go straight into our review queue. Suggest an edit · How this site is sourced