Intel i750

Lore & Background

The i750 chipset was used in video capture/compression cards such as the Intel Smart Video Recorder and Creative Labs Video Blaster RT300. These cards were needed to allow Video for Windows to record footage from a video camera. The Indeo video compressor was originally built to work with the i750, but was later ported to other systems as well. The 82750PB pixel processor contains a 57-instruction set, eight 64-bit vector registers (using the same MM0~MM7 register naming as on x86, though the i750 has dedicated registers while the x86 MMX CPU does not), a 64-bit ALU, a 512×48-bit instruction RAM, a 512×16-bit data RAM, two internal 16-bit buses, a wide instruction word processor, a variable length sequence decoder, a pixel interpolator, and an interface supporting a 4 GB linear address space. It can decompress high-resolution JPEG still images in approximately one second per image. The 82750DB display processor supports variable bits per pixel, pixels per line, and pixel widths, performs two-dimensional UV translation from YUV digital video format, generates CRT synchronization and control signals, and supports VGA, NTSC, PAL and SECAM video formats. A later low-cost variant, the 82750PD, supported the Shared Frame Buffer Interconnect (SFBI) specification, which reduced the components required to create a video-capturing subsystem and used Intel's Indeo software for compression/decompression streaming coding.

Reader's Guide

The Intel i750 represents Intel's first attempt to break into the video controller marketplace, following earlier graphics chips such as the 82786 graphics coprocessor. The effort was a failure and led to Intel leaving the market for some time. Despite this, the i750 was notable for its use in video capture/compression cards that enabled Video for Windows to record from video cameras, and for being the original target platform for the Indeo video compressor, which was later ported to other systems. The chipset's technical features included a pixel processor with dedicated vector registers (prefiguring the MMX register naming convention), a wide instruction word architecture, and support for real-time video decompression and effects. The later 82750PD variant introduced the SFBI specification, allowing shared frame buffer access among multiple devices. The i750's commercial failure marked a temporary retreat by Intel from the video controller market, but its technologies, particularly Indeo, continued to see use elsewhere.

Did You Know?

• The i750 is a two-chip GPU composed of the 82750PB pixel processor and 82750DB display processor.
• The 82750PB pixel processor uses the same MM0~MM7 register naming as x86 MMX, but with dedicated registers rather than sharing the floating-point unit.
• The 82750DB display processor supports VGA, NTSC, PAL and SECAM video formats.
• The low-cost 82750PD variant supported the Shared Frame Buffer Interconnect (SFBI) specification.