Microprocessors, Part 2 Codexery

Zilog Z280

A 16-bit Z80 enhancement with MMU, cache, and multiprocessor support.

Zilog Z280

The Zilog Z280 is a 16-bit microprocessor that Zilog developed as a major upgrade to the Z80 architecture, incorporating features from the shelved Z800 project. It launched in July 1987 but failed commercially.

Built with CMOS technology, the Z280 includes a memory management unit (MMU) that extends its addressable memory to 16 MB. It supports multitasking, multiprocessor and coprocessor setups, and contains 256 bytes of on-chip static RAM that can serve as a cache for instructions, data, or both, or as part of the normal memory map. Over 2,000 instruction and addressing mode combinations are available. The processor has Supervisor and User operating modes, and can optionally use separate address spaces for instructions and data in each mode, for a total of four possible address spaces. An external crystal or clock signal is halved to drive the CPU; the CPU clock can then be divided by 1, 2, or 4 to drive the bus (for example, a 12 MHz CPU with a divide-by-4 runs the bus at 3 MHz). Unlike the Z80, the Z280 multiplexes the lowest address byte onto the data bus, while the remaining address lines stay separate. In Z-BUS mode, the data bus expands to 16 bits and is multiplexed with the lower 16 address bits. Although the Z280 handles 16-bit arithmetic, data moves, and offers a 16-bit bus option, it only supports 8-bit operations for logic functions like AND, OR, and XOR.

More successful Z80 extensions include the Hitachi HD64180 (1986) and Zilog’s own eZ80 (2001), among others.

The Z280 packed many advanced features for its era: on-chip instruction and/or data cache or RAM; instruction pipelining; a high-performance 16-bit Z-BUS or 8-bit Z80-compatible bus interface; a built-in MMU with memory protection; instructions JAF and JAR to determine which register set is active; three on-chip 16-bit counter/timers; four on-chip DMA channels; an on-chip full-duplex UART; a user I/O trap; Supervisor mode with privileged instructions; an illegal instruction trap; a coprocessor emulation trap; burst mode memory access; multiprocessor support with many bus configuration modes; support for multiple external coprocessors via an accelerated communication interface; multiple I/O pages (allowing internal I/O devices without restricting I/O port address range, unlike the eZ80 or Z180); and a stack overflow warning.

Introduced
July 1987
Bit width
16-bit
Fabrication
CMOS
Addressable memory
16 MB (via on-chip MMU)
On-chip ram
256 bytes (configurable as cache or ordinary address space)
On-chip dma channels
4
On-chip counter/timers
3 (16-bit)

Lore & Background

The Z280 was fabricated in CMOS and added a memory management unit (MMU) to expand the addressing range to 16 MB. It included features for multitasking, multiprocessor and coprocessor configurations, and 256 bytes of on-chip static RAM configurable as either a cache for instructions and/or data, or as part of the ordinary address space. The processor offered a huge number of new instructions and addressing modes, giving a total of over 2000 combinations. It provided Supervisor and User operating modes, and optionally separate address spaces for instructions and data in both modes (four total possible address spaces).

Unlike the Z80, the Z280 multiplexed the lowest byte of its address onto the data bus; the rest of the address lines were not multiplexed. If running in Z-BUS mode, the data bus was expanded to 16 bits, multiplexed with the lower 16 bits of address. Although the Z280 universally handled 16-bit math and moves, and had a 16-bit bus option, it only supported 8-bit operations for logic functions such as AND, OR, and XOR. Its crystal or external clock signal was divided by half to drive the CPU; the CPU clock could be further divided by 1, 2, or 4 times to drive the bus.

In the early 1990s, a small number of single-board computers based on the Z280 were designed and produced by Tilmann Reh, but the CPU was never used in any commercially produced computer. In 2016, Lamar Owens contacted Tilmann Reh and obtained permission to have a small new run of the CPU280 system PCBs created, getting ten boards made and distributed to several beta builders. Wayne Warthen developed a build setup to rebuild the EPROM images and floppy disk images, and set up a page at GitHub for distribution and development. In spring 2018, another ten boards were made.

Reader's Guide

The Z280 was an ambitious attempt to extend the Z80 architecture with advanced features for its time, including an on-chip instruction and/or data cache, instruction pipelining, a built-in MMU with memory protection, and support for multiple external coprocessors through an accelerated communication interface. It also included three on-chip 16-bit counter/timers, four on-chip DMA channels, an on-chip full duplex UART, and multiple I/O pages that allowed internal I/O devices without restricting the address range of I/O ports. Despite these capabilities, the Z280 is considered a commercial failure. More successful extensions of the Z80 architecture include the Hitachi HD64180 (1986) and the Zilog eZ80 (2001). The Z280 never saw use in any commercially produced computer, though a small number of single-board computers were built by Tilmann Reh in the early 1990s, and later hobbyist runs of the CPU280 system PCBs were produced in 2016 and 2018, with development materials hosted on GitHub.

Did You Know?

Architecture & Design Philosophy

The Zilog Z280 arrived in July 1987 as a bold reimagining of the Z80 architecture, weaving in improvements drawn from the abandoned Z800 project. Fabricated in CMOS, it leapt from the original's 8-bit roots into a 16-bit world. A built-in memory management unit stretched the addressable space to a full 16 megabytes, and 256 bytes of on-chip static RAM could serve as an instruction or data cache or simply fold into the ordinary address space. The instruction set swelled to more than two thousand distinct opcode and addressing-mode combinations. Operating modes split between Supervisor and User privilege levels, with the option to maintain separate instruction and data address spaces in each, yielding up to four isolated spaces. The clocking scheme divided the crystal or external signal by two to drive the CPU, then allowed further division by one, two, or four for the bus. One quirk set it apart from the Z80: the lowest address byte was multiplexed onto the data bus while the remaining address lines ran independently. In Z-BUS configuration the data path widened to sixteen bits, though logic operations like AND, OR, and XOR remained confined to eight-bit width despite the 16-bit math and move capabilities.

A Promising Lineage, a Commercial Miss

Despite its ambitious feature set, the Z280 is widely regarded as a commercial failure. It never found its way into any commercially produced computer. In the early 1990s, Tilmann Reh designed and produced a small number of single-board computers built around the Z280, but these remained niche projects rather than products reaching a broad market. The Z80 family tree, however, continued to bear fruit through other branches. Hitachi's HD64180, introduced in 1986, and Zilog's own eZ80, released in 2001, both proved to be far more successful extensions of the original Z80 architecture. The Z280's failure is particularly striking given how many of its capabilities anticipated features that later became standard in embedded and general-purpose processors. Its combination of an on-chip MMU, instruction pipelining, and multitasking support placed it well ahead of many contemporaries, yet the market simply did not embrace it. The Z280 thus occupies a fascinating position in microprocessor history: a technically impressive chip whose particular blend of features did not align with buyer demand, leaving it as a footnote in a family that would go on to produce far more widely adopted successors.

A Feature Set Ahead of Its Time

The Z280's specification reads like a wishlist for what a 1980s microprocessor could aspire to be. Beyond the core 16-bit execution engine, it packed in instruction pipelining for improved throughput, a high-performance 16-bit Z-BUS interface alongside an 8-bit Z80-compatible bus option, and a built-in MMU with memory protection. Three on-chip 16-bit counter/timers and four DMA channels handled peripheral and data-movement tasks without burdening the CPU. A full-duplex UART lived on the die, and a user I/O trap provided a flexible interrupt mechanism. Privilege enforcement came through Supervisor mode with its set of privileged instructions, while traps for illegal instructions and coprocessor emulation added robust error handling. Burst-mode memory access and multiprocessor support with multiple bus configuration modes made it suitable for larger systems. The chip could communicate with multiple external coprocessors through an accelerated interface, and multiple I/O pages allowed internal I/O devices to coexist without restricting the port address range or conflicting with existing motherboard devices. Stack overflow warnings, JAF and JAR instructions for identifying which register set was in context, and the ability to configure the on-chip RAM as cache or address space rounded out a remarkably complete feature list for a processor of its era.

From Obscurity to Community Revival

The Z280's story did not end with its commercial failure. In the early 1990s, Tilmann Reh designed and produced a small batch of single-board computers centered on the chip, keeping the architecture alive in a handful of hands. Then, in 2016, a quiet revival began when Lamar Owens reached out to Reh and secured permission to commission a new production run of the CPU280 system PCBs. Ten boards were fabricated and distributed to a group of beta builders eager to explore the platform. Wayne Warthen took on the software side, developing a build environment capable of reconstructing the EPROM images and floppy disk images, and he established a GitHub page to host the code and coordinate ongoing development and distribution. The community's interest proved durable enough that by the spring of 2018, another ten boards were produced. Though the Z280 never shipped in a commercial computer, this grassroots effort transformed it from a forgotten footnote into a living project, with a small but dedicated group of enthusiasts preserving, studying, and extending a chip that the mainstream market had passed over more than three decades earlier.

More in Microprocessors, Part 2 1-24

Spotted an error? Know more?

Reader corrections go straight into our review queue. Suggest an edit · How this site is sourced

Comments

Loading…
Open in the interactive codex →