AMD Am29000
32-bit RISC family with variable register windows and embedded focus.
The AMD Am29000, often called the 29k, is a family of 32-bit RISC microprocessors and microcontrollers from Advanced Micro Devices. It builds on the foundational Berkeley RISC design with several key enhancements. These chips were widely used in laser printers from various manufacturers, notably powering the high-end HP Color LaserJet line from its first model (using the Am29030) through the HP Color LaserJet 5 (which used the Am29040).
Development began around 1984–1985, with an announcement in March 1987 and release in May 1988. The initial Am29000 was followed by multiple versions, the last being the Am29040 in 1995. The Am29050 stood out as an early processor with a floating-point unit capable of performing one multiply–add operation per cycle. AMD was working on a superscalar version until late 1995, when the project was dropped and the design team reassigned to support the PC (x86) side of the business. The remaining embedded efforts shifted to the 186 family of 80186 derivatives. By then, most of AMD’s resources were focused on high-performance x86 desktop processors, and many ideas and components from the 29k designs were reused in the AMD K5.
**Design**
The 29k traces its roots to the same Berkeley RISC design that produced the Sun SPARC, Intel i960, ARM, and RISC-V. One feature from Berkeley RISC used in some of these designs is register windows, which speeds up procedure calls by treating a large set of registers as a stack. Local data is loaded into a set of registers during a call, and those registers are marked "dead" when the routine returns. Return values are placed in a global register set—for example, the top eight registers in the SPARC. The competing Stanford MIPS design considered this approach but concluded that better compilers could use general-purpose registers more efficiently than a fixed window.
In the original Berkeley design, SPARC, and i960, the windows were fixed in size. A routine using only one local variable would still consume eight registers on the SPARC, wasting valuable space. The 29k differed by using variable-sized windows. In that case, only two registers would be used: one for the local variable and one for the return address. The 29k also added more registers: 128 for the procedure stack and another 64 for global access. By comparison, the SPARC had 128 registers total, with a global set of just eight.
- Announced
- March 1987
- Released
- May 1988
- Initial development period
- 1984–1985
- Final version
- Am29040 (1995)
- Transistor count (am29050)
- 428,000
- Process (am29050)
- 1-micron with 0.8-micron effective channel length
- Die size (am29040)
- 119 mm²
Lore & Background
The 29k evolved from the same Berkeley RISC design that also led to the Sun SPARC, Intel i960, ARM and RISC-V. One design element used in some of the Berkeley RISC-derived designs is the concept of register windows, a technique used to speed up procedure calls significantly. In the original Berkeley design, SPARC, and i960, the windows were fixed in size. The 29k differed from these earlier designs, using a variable window size. It also added more registers, including 128 registers for the procedure stack, and another 64 for global access. The 29k also extended the register window stack with an in-memory (and in theory, in-cache) stack. Another difference from the Berkeley design is that the 29k avoided use of the condition codes. Conditional branches were limited to branching on the most significant (sign) bit of a general-purpose register, which could be set by one of a series of compare instructions. A Branch Target Cache (512 bytes on the 29000 and 1024 bytes on the 29050) stored sets of 4 or 2 sequential instructions found at the branch target address, reducing the instruction fetch latency during taken branches. Support for virtual address translation followed a similar approach to that of the MIPS architecture, with a 64-entry translation lookaside buffer (TLB) and a dedicated least recently used register.
Reader's Guide
The 29k was positioned as a product for medium- to high-performance embedded applications with potential for use in Unix workstations. It was used in a variety of products such as X terminals, laser printer controller cards, graphics accelerator cards, optical character recognition solutions, and network bridges. The memory architecture of the 29000 was a particular attraction for product designers, allowing them to forego external cache memory and to employ dynamic RAM directly while maintaining acceptable performance. The 29k saw some use as a computational accelerator or coprocessor, particularly on the Macintosh and IBM PC-compatible platforms. AMD was designing a superscalar version until late 1995, when AMD dropped the development of the 29k because the design team was transferred to support the PC (x86) side of the business. What remained of AMD's embedded business was realigned towards the embedded 186 family of 80186 derivatives. By then the majority of AMD's resources were concentrated on their high-performance x86 processors for desktop PCs, using many of the ideas and individual parts of the 29k designs to produce the AMD K5. The superscalar version, codenamed Jaguar, was an advanced design capable of four-way dispatch into six reservation stations and speculative out-of-order execution of instructions. AMD used the unreleased 29K microarchitecture as the basis of the K5 series of x86-compatible processors.
Did You Know?
- The Am29000 was based on the same Berkeley RISC design that led to the Sun SPARC, Intel i960, ARM and RISC-V.
- The 29k used variable-size register windows, unlike the fixed-size windows of SPARC and i960.
- The Am29050 featured a floating-point unit capable of executing one multiply–add operation per cycle.
- The canceled superscalar version of the 29k, codenamed Jaguar, was used as the basis for the AMD K5 x86 processor.
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