DEC V-11
DEC's first VAX microprocessor design, second to ship.
The V-11, code-named "Scorpio," was a multi-chip processor set from Digital Equipment Corporation (DEC) that implemented the full VAX instruction set. Although it was DEC’s first attempt at a VAX microprocessor, it actually reached the market after the MicroVAX 78032. The chip set was introduced in early 1986 running at 5 MHz, with a faster 6.25 MHz version following in 1987. At the lower speed, its performance matched that of the VAX-11/780 superminicomputer; at the higher speed, it was about 1.2 times faster.
The V-11 was a complete VAX implementation, handling all 304 instructions and all 17 data types. It was used exclusively in DEC’s own systems: the VAX 8200, 8250, 8300, and 8350 minicomputers, as well as the VAXstation 8000 workstation.
The chip set consisted of four main processor chips—the I/E chip, the M chip, the F chip—and five ROM/RAM chips. These were connected by four buses: the 40-bit MIB (microinstruction bus), the 32-bit DAL (data/address bus), plus the PAL and CAL buses. The ROM/RAM chips (DC327) each held one-fifth of the patchable control store, combining a 16 KB ROM, a 1 KB RAM for patches, and a content-addressable memory. Five of these chips were mounted together in a distinctive wide DIP package.
The I/E chip (DC328) handled instruction buffering, microsequencing, and execution. It contained a two-entry instruction buffer, sixteen 32-bit general-purpose registers, an ALU, a shifter, and a small translation lookaside buffer (TLB) with five page table entries. On a TLB miss, the backup translation buffer in the M chip was used.
The M chip (DC329) managed memory and interrupts. It held the backup TLB tags, cache tags, and 26 internal processor registers for microcode use. It also provided the I/O functions defined by the VAX architecture and generated the system clock. The backup TLB itself stored 512 page table entries, split evenly between system and process space.
The F chip (DC330) was the floating-point unit, handling most VAX floating-point instructions and the f_floating, d_floating, and g_floating data types. It also executed integer multiply and divide instructions. The F chip was derived from the FPA, a component of the J-11 chip set for the PDP-11, rather than being a completely new design—this change was made to simplify the V-11 and speed up its development.
- Introduced
- Early 1986 at 5 MHz; 1987 at 6.25 MHz
- Clock speeds
- 5 MHz (200 ns cycle time); 6.25 MHz (160 ns cycle time)
- Transistor count
- 1,183,600 total across nine dies
- Process
- ZMOS, a 3.0 μm NMOS process with two levels of interconnect
- Performance
- At 5 MHz, approximately same as VAX-11/780; at 6.25 MHz, approximately 1.2 times faster
- Chip set
- I/E chip (DC328), M chip (DC329), F chip (DC330), five ROM/RAM chips (DC327)
- Cache
- External 8 KB primary cache, physically addressed, 64-byte cache block
Lore & Background
The V-11 was part of the Scorpio program, which aimed to give DEC the ability to develop and fabricate very-large-scale integration (VLSI) integrated circuits. The program also produced a new computer-aided design (CAD) suite called CHAS and a semiconductor process named ZMOS, the first process developed entirely by DEC. The V-11 was presented at the 39th International Solid State Circuits Conference in 1984 alongside the MicroVAX 78032, and entered systems in early 1986 at 5 MHz, with a 6.25 MHz version following in 1987.
The chip set consisted of nine dies: an I/E chip containing an instruction buffer, microsequencer, execution unit, and mini-translation buffer; an M chip handling memory management, interrupt handling, and clock generation; an F chip for floating-point and integer multiply/divide; and five ROM/RAM chips providing the patchable control store. The chips were connected by four buses: the MIB, DAL, PAL, and CAL. The F chip was a derivative of the FPA from the J-11 microprocessor chip set (a PDP-11 implementation), adopted after a planned new design was cancelled to simplify the V-11 and speed completion as development of the MicroVAX 78032 had begun.
Reader's Guide
The V-11 was notable as DEC's first attempt at a VAX microprocessor, though it shipped after the MicroVAX 78032. It was a complete VAX implementation, unlike the MicroVAX 78032 which implemented a subset of the ISA, and it offered performance comparable to or slightly better than the VAX-11/780 superminicomputer. The chip set was proprietary to DEC and used only in their mid-range minicomputers and a workstation, reflecting its role as a processor for systems rather than a general-purpose microprocessor.
The Scorpio program's development of the ZMOS process and CHAS CAD suite represented a significant investment in in-house VLSI capability. The V-11's multichip design, with separate I/E, M, F, and ROM/RAM chips, and its use of a patchable control store via RAM on the ROM/RAM chips, illustrate the state of VLSI design in the mid-1980s. Its external 8 KB cache and backup translation buffer with 512 PTEs show the architectural choices made to balance complexity and performance. The V-11's legacy lies in being a stepping stone in DEC's VAX microprocessor evolution, preceding later single-chip implementations.
Did You Know?
- The V-11 was code-named "Scorpio" and was part of a program that also developed the ZMOS semiconductor process and the CHAS CAD suite.
- The five ROM/RAM chips (DC327) were mounted on a common ceramic carrier in an overly wide DIP package, each with different ROM contents.
- At 5 MHz, the V-11 performed approximately the same as the VAX-11/780 superminicomputer; at 6.25 MHz, it was about 1.2 times faster.
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