Clipper architecture
A 32-bit RISC-like architecture with macro instructions and limited market adoption.
The Clipper architecture is a 32-bit CPU instruction set design from Fairchild Semiconductor, resembling a reduced instruction set computer (RISC). Its instruction set was simpler than older complex instruction set computer (CISC) designs, but it included a few more complex instructions than other RISC processors of the time. These were handled by a Macro Instruction ROM inside the CPU, which gave the Clipper slightly better code density than other RISC chips. The architecture saw limited commercial success: only Intergraph and High Level Hardware built major product lines around it, though Opus Systems also offered a Clipper-based model in its Personal Mainframe series.
Fairchild initially produced the first Clipper processors, but in 1987 it sold the division responsible to Intergraph, which continued developing the chips for its own systems. The first model, the C100, arrived in 1986. Intergraph followed with the faster C300 in 1988. The final version, the C400, came out in 1990 and was heavily redesigned for greater speed, adding more floating-point registers. It was the first processor to combine both superscalar instruction dispatch and superpipelined operation. Intergraph began work on a successor called the C5, but it was never finished. However, advanced techniques devised for the C5 led to patents, which Intergraph later used in patent-infringement lawsuits against Intel and others.
Unlike most microprocessors, Clipper chips came as sets of multiple separate chips. The C100 and C300 each used three chips: one CPU combining integer and floating-point units, plus two cache and memory management units (CAMMUs)—one for data and one for instructions. The CAMMUs held caches, translation lookaside buffers, and support for memory protection and virtual memory. The C400 had four basic units: an integer CPU, an FPU, an MMU, and a cache unit. Early versions used one chip each for the CPU and FPU, with discrete parts for the MMU and cache; later versions merged the MMU and cache into a single CAMMU chip.
The Clipper has 16 integer registers (R15 serves as the stack pointer), 16 floating-point registers (limited to 8 in early models), plus a program counter (PC), a processor status word (PSW) with ALU and FPU flags and trap enables, and a system status word (SSW) controlling external interrupts, user/supervisor mode, and address translation.
Quick Facts
- Designer
- Fairchild Semiconductor · Intergraph
- Bits
- 32-bit
- Design
- RISC-like
Facts from the source article.
Lore & Background
The first processors using the Clipper architecture were designed and sold by Fairchild, but the division responsible for them was subsequently sold to Intergraph in 1987; Intergraph continued work on Clipper processors for use in its own systems. The initial Clipper microprocessor produced by Fairchild was the C100, which became available in 1986. This was followed by the faster C300 from Intergraph in 1988. The final model was the C400, released in 1990, which was extensively redesigned to be faster and added more floating-point arithmetic registers. The C400 combined superscalar instruction dispatch and superpipelined operation, making it the first processor to use both techniques simultaneously.
Unlike many other microprocessors, the Clipper processors were actually sets of several distinct chips. The C100 and C300 consist of three chips: one central processing unit containing both an integer unit and a floating point unit, and two cache and memory management units (CAMMUs), one for data and one for instructions. The C400 consists of four basic units: an integer CPU, an FPU, an MMU, and a cache unit. The initial version used one chip each for the CPU and FPU and discrete elements for the MMU and cache unit, but in later versions the MMU and cache unit were combined into one CAMMU chip.
The Clipper has 16 integer registers (R15 is used as the stack pointer), 16 floating-point registers (limited to 8 in early implementations), plus a program counter, a processor status word, and a system status word. User and supervisor modes have separate banks of integer registers. The Clipper is a load/store architecture, where arithmetic operations could only specify register or immediate operands. The basic instruction parcel is 16 bits. Addressing modes include register relative, PC-relative, absolute, and indexed. The processor supports operations such as 32×32→32-bit multiply, divide, and remainder, 64-bit shifts and rotates, 32×32→64-bit extended multiplies, integer register push/pop, subroutine call and return, atomic memory load and set msbit, supervisor trap, and more complex macro instructions for push/pop multiple registers, return from interrupt, and string operations.
Reader's Guide
Intergraph sold several generations of Clipper systems, including both servers and workstations, under the InterAct, InterServe, and InterPro product lines, targeted largely at the computer-aided design (CAD) market. Fairchild promoted the CLIX operating system, a version of UNIX System V, for use with the Clipper; Intergraph adopted CLIX for its Clipper-based systems and continued to develop it, making it the only operating system available for those systems. Intergraph did work on a version of Microsoft Windows NT for Clipper systems and publicly demonstrated it, but this effort was canceled before release. Intergraph decided to discontinue the Clipper line and instead began selling x86 systems with Windows NT.
Intergraph started work on a subsequent Clipper processor design known as the C5, but this was never completed or released. Nonetheless, some advanced processor design techniques were devised for the C5, and Intergraph was granted patents on these. These patents, along with the original Clipper patents, have been the basis of patent-infringement lawsuits by Intergraph against Intel and other companies. The Clipper architecture's legacy lies primarily in its technical innovations—particularly the C400's pioneering combination of superscalar and superpipelined techniques—and in the patent litigation that followed its discontinuation.
Did You Know?
- The Clipper processors were sets of multiple chips: the C100 and C300 used three chips, while the C400 used four basic units.
- Intergraph sold Clipper-based systems under the InterAct, InterServe, and InterPro product lines, mainly for the CAD market.
- Intergraph's patents from the unfinished C5 design, along with original Clipper patents, were used in patent-infringement lawsuits against Intel and other companies.
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