ARM11
ARMv6 32-bit RISC cores for demanding applications.
The ARM11 is a family of 32-bit RISC processor cores licensed by ARM Holdings. It includes the ARM1136J(F)-S, ARM1156T2(F)-S, ARM1176JZ(F)-S, and ARM11MPCore. Released between 2002 and 2005, these cores are no longer recommended for new chip designs; ARM now offers the Cortex-A and Cortex-R series as replacements.
Announced in April 2002, the ARM11 family introduced the ARMv6 architecture extensions, which had been revealed the previous October. These additions brought SIMD media instructions, support for multiple processors, exclusive load and store operations, and a new cache design. The pipeline was significantly improved over the earlier ARM9 and ARM10 families, enabling higher clock speeds. The first core, the ARM1136, was made available to licensees in October 2002. ARM11 cores are the only ones based on the ARMv6 architecture, though ARMv6-M cores (Cortex-M0 and Cortex-M1) exist for microcontrollers; ARM11 targets more demanding applications.
Compared to the ARM9, the ARM11 builds on the ARM926EJ-S feature set and adds ARMv6 instructions for media processing (SIMD) and faster interrupt response. Microarchitecture improvements include SIMD instructions that can double the speed of MPEG-4 and audio DSP algorithms. The cache is physically addressed, which reduces cache aliasing and lowers context-switch overhead. Unaligned and mixed-endian data access is supported. The core produces less heat and lowers overheating risk. The pipeline was redesigned with eight stages (up from five), allowing target clock speeds up to 1 GHz. It supports out-of-order completion for some operations (like stores), dynamic branch prediction and folding (similar to XScale), and cache misses no longer block execution of non-dependent instructions. Load/store and ALU parallelism are present, along with 64-bit data paths. JTAG debug support (for halting, stepping, breakpoints, and watchpoints) was simplified, replacing the EmbeddedICE module with an interface later adopted in ARMv7. The hardware tracing modules (ETM and ETB) are updated versions of those in the ARM9, with trace semantics adjusted for parallel instruction execution and data transfers.
ARM emphasizes recommended Verilog coding styles and techniques to ensure semantically rigorous designs that preserve identical behavior throughout the chip design flow, relying heavily on formal verification.
Quick Facts
- Designfirm
- ARM Holdings
- Arch
- ARM (32-bit), / Thumb (16-bit), / Thumb-2 (32-bit) / (ARMv6, ARMv6T2, ARMv6Z, ARMv6K)
Facts from the source article.
Lore & Background
The ARM11 product family was announced on 29 April 2002, introducing the ARMv6 architectural additions that had been announced in October 2001. These additions include SIMD media instructions, multiprocessor support, exclusive loads and stores instructions, and a new cache architecture. The implementation includes a significantly improved instruction processing pipeline compared to previous ARM9 or ARM10 families, and is used in smartphones from Apple, Nokia, and others. The initial ARM11 core (ARM1136) was released to licensees in October 2002.
The ARM11 family are currently the only ARMv6-architecture cores. There are, however, ARMv6-M cores (Cortex-M0 and Cortex-M1) addressing microcontroller applications; ARM11 cores target more demanding applications. Microarchitecture improvements include SIMD instructions that can double MPEG-4 and audio digital signal processing algorithm speed, a physically addressed cache solving many cache aliasing problems and reducing context switch overhead, unaligned and mixed-endian data access support, reduced heat production, and a redesigned 8-stage pipeline supporting faster clock speeds (target up to 1 GHz). Other features include out-of-order completion for some operations, dynamic branch prediction/folding, cache misses not blocking execution of non-dependent instructions, load/store parallelism, ALU parallelism, 64-bit data paths, and simplified JTAG debug support.
Reader's Guide
The ARM11 generation marked a significant architectural step with the introduction of ARMv6 features, including SIMD media instructions and multiprocessor support, which were adopted in a wide range of consumer devices such as smartphones from Apple and Nokia. The four cores—ARM1136, ARM1156 (introducing Thumb2 instructions), ARM1176 (introducing security extensions), and ARM11MPcore (introducing multicore support)—addressed different market segments within demanding applications. The family's focus on synthesis and register-transfer level (RTL) quality was magnified by integration into many different designs using various logic synthesis tools and chip manufacturing processes. ARM made an effort to promote recommended Verilog coding styles and techniques to ensure semantically rigorous designs and preserve identical semantics throughout the chip design flow, using extensive formal verification techniques to avoid latent bugs when integrating with third-party designs. Although no longer recommended for new IC designs, the ARM11 cores were used in numerous chips including the Broadcom BCM2835 (Raspberry Pi 1), Nvidia Tegra, Texas Instruments OMAP2 series, and the iPhone 3G series. The family's legacy includes establishing the ARMv6 architecture as the foundation for later Cortex-A and Cortex-R cores.
Did You Know?
- The ARM11 family are the only ARMv6-architecture cores.
- The ARM1156 core introduced Thumb2 instructions.
- The ARM1176 core introduced security extensions.
- The ARM11MPcore introduced multicore support.
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