RDNA 3

Lore & Background

AMD first mentioned RDNA 3 at their Financial Analyst Day on June 9, 2022, announcing a performance-per-watt uplift of over 50% and a 5 nm chiplet design. A sneak preview appeared during the Ryzen 7000 unveiling on August 29, 2022, showing gameplay of Lies of P and confirming the chiplet approach. Full architectural details were unveiled on November 3, 2022 in Las Vegas.

The chiplet initiative was led by AMD Senior Vice President Sam Naffziger, who had previously led the chiplet effort for Ryzen and Epyc. Development began towards the end of 2017.

RDNA 3 uses two types of chiplets: the Graphics Compute Die (GCD) and Memory Cache Dies (MCDs). Dies are connected via TSMC's Integrated Fan-Out Re-Distribution Layer (InFO-RDL) packaging, providing a silicon bridge for high-bandwidth die-to-die communication. Each Infinity Fanout link has 9.2 Gbps bandwidth, achieving cumulative bandwidth of 5.3 TB/s.

Each MCD contains 16 MB of L3 cache and two 32-bit GDDR6 memory interfaces. The Radeon RX 7900 XTX uses six MCDs for a 384-bit bus, while the RX 7900 XT uses five for a 320-bit bus. The GCD features improved dual-issue shader ALUs, a scheduler for AI acceleration with WMMA instructions supporting FP16, BF16, INT8, and INT4, and second-generation ray-tracing accelerators.

Clock speeds are decoupled: the front end operates at 2.5 GHz while shaders run at 2.3 GHz, yielding up to 25% power savings. L1 cache is doubled to 256 KB, L2 cache increased to 6 MB, while L3 Infinity Cache was reduced to 96 MB due to the wider memory interface. The architecture includes a dedicated media engine based on VCN 4.0 and a Radiance Display Engine supporting DisplayPort 2.1 UHBR 13.5.

Reader's Guide

RDNA 3's significance lies in its pioneering use of chiplet packaging for consumer GPUs, a strategy that allowed AMD to fabricate different dies on different process nodes—5 nm for the GCD and 6 nm for the MCDs—improving yields and cost efficiency. The architecture delivered a claimed 54% increase in performance-per-watt, meeting AMD's earlier projections. Its dual-issue shader ALUs and AI acceleration scheduler improved compute throughput and inference performance, with Tom's Hardware reporting that the RX 7900 XTX generated 26 images per minute with Stable Diffusion versus 6.6 for the RX 6950 XT.

The wider 384-bit memory bus reduced reliance on the Infinity Cache, while the new media and display engines added AV1 encoding and DisplayPort 2.1 support. RDNA 3 also served as the basis for the RDNA 3.5 optimizations announced in 2024, which doubled per-cycle texel output and improved LPDDR5 memory management for low-power devices like laptops and handheld gaming PCs. The architecture's chiplet design influenced subsequent AMD GPU generations and demonstrated the viability of modular GPU construction outside of datacenter accelerators.