Phase-locked loop

Lore & Background

Spontaneous synchronization of weakly coupled pendulum clocks was noted by Christiaan Huygens as early as 1673. Around the turn of the 19th century, Lord Rayleigh observed synchronization of weakly coupled organ pipes and tuning forks. In 1919, W. H. Eccles and J. H. Vincent found that two electronic oscillators tuned to slightly different frequencies but coupled to a resonant circuit would soon oscillate at the same frequency. Automatic synchronization of electronic oscillators was described in 1923 by Edward Victor Appleton. In 1923, Harry Nyquist patented a PLL with a motor-generator as the oscillator. In 1925, David Robertson introduced phase locking in his clock design to control the striking of the bell Great George in the new Wills Memorial Building. Robertson's clock incorporated an electromechanical device that could vary the rate of oscillation of the pendulum, and derived correction signals from a circuit that compared the pendulum phase with that of an incoming telegraph pulse from Greenwich Observatory every morning at 10:00 GMT. Including equivalents of every element of a modern electronic PLL, Robertson's system was notably ahead of its time in that its phase detector was a relay logic implementation of the transistor circuits for phase/frequency detectors not seen until the 1970s. Robertson's work predated research towards what was later named the phase-lock loop in 1932, when British researchers developed an alternative to Edwin Armstrong's superheterodyne receiver, the Homodyne or direct-conversion receiver. In the homodyne or synchrodyne system, a local oscillator was tuned to the desired input frequency and multiplied with the input signal. The resulting output signal included the original modulation information. The technique was described in 1932, in a paper by Henri de Bellescize, in the French journal L'Onde Électrique. In analog television receivers since at least the late 1930s, phase-locked-loop horizontal and vertical sweep circuits are locked to synchronization pulses in the broadcast signal. In 1969, Signetics introduced a line of low-cost monolithic integrated circuits like the NE565 using bipolar transistors, which were complete phase-locked loop systems on a chip, and applications for the technique multiplied. A few years later, RCA introduced the CD4046 Micropower Phase-Locked Loop using CMOS, which also became a popular integrated circuit building block.

Reader's Guide

Phase-locked loops are widely used for synchronization purposes; in space communications for coherent demodulation and threshold extension, bit synchronization, and symbol synchronization. Phase-locked loops can also be used to demodulate frequency-modulated signals. In radio transmitters, a PLL is used for frequency synthesis. The simple analog PLL consists of a voltage-controlled oscillator (VCO) and a phase detector in a feedback loop. The phase detector compares the phase of the VCO's output with the phase of the input reference signal and outputs a voltage (stabilized by a filter) to adjust the oscillator's frequency to match the phases. A clock analogy illustrates the principle: a mechanical clock that drifts a few seconds per hour can be synchronized by making small proportional adjustments to its rate based on observed misalignment, eventually locking both frequency and phase to a reference clock. An early electromechanical version of a phase-locked loop was used in 1921 in the Shortt-Synchronome clock. PLLs may be implemented as analog or digital circuits, with variations including analog PLL (APLL), digital PLL (DPLL), all digital PLL (ADPLL), neuronal PLL (NPLL), software PLL (SPLL), and charge-pump PLL (CP-PLL). Performance parameters include type and order, frequency ranges (hold-in, pull-in, lock-in), loop bandwidth, transient response, steady-state errors, output spectrum purity, phase-noise, and general parameters such as power consumption.

Did You Know?

• David Robertson's 1925 clock design included a relay logic phase detector, ahead of its time.
• The first integrated circuit PLL was introduced by Signetics in 1969 (NE565).
• Christiaan Huygens noted spontaneous synchronization of pendulum clocks as early as 1673.