Phase-locked loop range
Frequency deviation intervals for PLL lock under varying conditions.
Phase-locked loop (PLL) range refers to the frequency deviation intervals within which a PLL-based circuit can achieve or maintain lock under various conditions. The terms hold-in range, pull-in range (acquisition range), and lock-in range are widely used by engineers to describe these concepts, each defined by different initial states and perturbation scenarios.
- Hold in range
- Largest interval of frequency deviations for which a locked state exists; loop re-achieves lock after small perturbations of filter state, phases, and frequencies.
- Pull in range
- Largest interval of frequency deviations such that PLL acquires lock for arbitrary initial phase, initial frequency, and filter state; also called acquisition range or capture range.
- Lock in range
- If the loop is in a locked state, after an abrupt change of free-running frequency within this range, the PLL acquires lock without cycle slipping.
Lore & Background
The concepts of hold-in, pull-in, and lock-in ranges were introduced in classic books on phase-locked loops published in 1966. They are widely used in contemporary engineering literature, though usually only non-strict definitions are given. A handbook on synchronization and communications later advised checking definitions carefully before use, and rigorous mathematical definitions were subsequently provided.
Floyd M. Gardner introduced the lock-in concept in the first edition of his work, defining it as the maximum frequency difference for which the loop locks almost instantaneously without slipping cycles. However, because even at zero frequency difference initial states may cause cycle slipping, Gardner's concept lacked rigor. In the second edition, he stated there is no natural way to define any unique lock-in frequency, yet acknowledged that despite its vague reality, lock-in range remains a useful concept.
The pull-in range is associated with transient stability: when the loop power is switched on with a large initial frequency difference, the VCO frequency slowly tunes toward the reference. Difficulties in reliable numerical analysis of the pull-in range may arise from hidden attractors in the dynamical model of the circuit.
Reader's Guide
The hold-in, pull-in, and lock-in ranges serve as fundamental benchmarks for characterizing PLL performance in engineering practice. The hold-in range defines the steady-state stability boundary: within it, the loop tracks slow changes in input frequency and recovers from small perturbations. The pull-in range, also called acquisition or capture range, describes the loop's ability to acquire lock from arbitrary initial conditions, including power-on scenarios, and is critical for assessing transient stability. The lock-in range, though lacking a precise mathematical definition, remains a practically useful concept for describing fast acquisition without cycle slipping after abrupt frequency steps. Together, these ranges provide engineers with a framework for evaluating PLL behavior under different operating conditions, from tracking to acquisition. The presence of hidden attractors in dynamical models can complicate pull-in range analysis, highlighting the need for careful numerical methods. Despite ongoing debate about the rigor of the lock-in definition, the three ranges continue to be standard terms in synchronization and communications literature.
Did You Know?
- The terms hold-in, pull-in, and lock-in range were introduced in classic PLL books published in 1966.
- The pull-in range is also called acquisition range or capture range.
- Hidden attractors in dynamical models may cause difficulties in reliable numerical analysis of the pull-in range.
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