[{"n": "Microprocessor", "u": "/e/microprocessors/microprocessor/", "s": "A single-chip CPU that revolutionized computing through integration."}, {"n": "Microprocessor chronology", "u": "/e/microprocessors/microprocessor-chronology/", "s": "A timeline of microprocessor evolution from 4-bit to multi-core chips."}, {"n": "Instruction set architecture", "u": "/e/microprocessors/instruction-set-architecture/", "s": "An ISA is the fundamental abstraction ensuring binary compatibility across processor implementations."}, {"n": "TRIPS architecture", "u": "/e/microprocessors/trips-architecture/", "s": "EDGE-based processor using compiler-scheduled hyper-blocks for high parallelism."}, {"n": "European Processor Initiative", "u": "/e/microprocessors/european-processor-initiative/", "s": "European project developing low-power processors and accelerators for exascale computing."}, {"n": "Interconnect bottleneck", "u": "/e/microprocessors/interconnect-bottleneck/", "s": "Limits on chip performance due to connection speed constraints."}, {"n": "Latency oriented processor architecture", "u": "/e/microprocessors/latency-oriented-processor-architecture/", "s": "Microarchitecture optimized for low-latency serial thread execution."}, {"n": "Megahertz myth", "u": "/e/microprocessors/megahertz-myth/", "s": "Clock rate alone does not determine processor performance."}, {"n": "Microarchitecture", "u": "/e/microprocessors/microarchitecture/", "s": "The implementation of an instruction set architecture in a processor."}, {"n": "Mobile processor", "u": "/e/microprocessors/mobile-processor/", "s": "Low-power CPU designed for portable, fanless computing."}, {"n": "Multi-core processor", "u": "/e/microprocessors/multi-core-processor/", "s": "A single-chip processor with multiple cores for parallel execution."}, {"n": "Multiclet", "u": "/e/microprocessors/multiclet/", "s": "First post von Neumann, multicellular dynamically reconfigurable microprocessor."}, {"n": "Multiprocessor system on a chip", "u": "/e/microprocessors/multiprocessor-system-on-a-chip/", "s": "An SoC integrating multiple processor cores for parallel computing."}, {"n": "Multithreading (computer architecture)", "u": "/e/microprocessors/multithreading-computer-architecture/", "s": "Hardware technique enabling multiple threads on a single CPU core."}, {"n": "Single-core", "u": "/e/microprocessors/single-core/", "s": "A microprocessor with a single CPU core on its die."}, {"n": "Stack machine", "u": "/e/microprocessors/stack-machine/", "s": "A processor using a push-down stack for temporary values."}, {"n": "Tensor Processing Unit", "u": "/e/microprocessors/tensor-processing-unit/", "s": "Google's custom ASIC for neural network machine learning."}, {"n": "Uncore", "u": "/e/microprocessors/uncore/", "s": "Intel term for non-core functions integrated for high performance."}, {"n": "Ralph Ungermann", "u": "/e/microprocessors/ralph-ungermann/", "s": "Engineer and entrepreneur who co-founded Zilog and Ungermann-Bass."}, {"n": "Vision processing unit", "u": "/e/microprocessors/vision-processing-unit/", "s": "A microprocessor specialized for accelerating machine vision tasks."}, {"n": "Motorola MC14500", "u": "/e/microprocessors/motorola-mc14500/", "s": "A one-bit CMOS microprocessor for industrial control applications."}, {"n": "Intersil 6100", "u": "/e/microprocessors/intersil-6100/", "s": "A CMOS implementation of the PDP-8 instruction set."}, {"n": "Toshiba TLCS-12", "u": "/e/microprocessors/toshiba-tlcs-12/", "s": "A 12-bit microprocessor used in Ford's EEC engine control."}, {"n": "1801 series CPU", "u": "/e/microprocessors/1801-series-cpu/", "s": "Soviet 16-bit PDP-11-compatible microprocessor family, widely used in home and industrial computers."}, {"n": "Data General microNOVA", "u": "/e/microprocessors/data-general-micronova/", "s": "Single-chip Nova implementation, limited market adoption."}, {"n": "DEC T-11", "u": "/e/microprocessors/dec-t-11/", "s": "DEC's first single-chip microprocessor, implementing the PDP-11 ISA."}, {"n": "Fairchild 9440", "u": "/e/microprocessors/fairchild-9440/", "s": "Single-chip Nova 2 implementation in bipolar I3L, introduced 1977."}, {"n": "Ferranti F100-L", "u": "/e/microprocessors/ferranti-f100-l/", "s": "Europe's first 16-bit microprocessor, built for military environments."}, {"n": "General Instrument CP1600", "u": "/e/microprocessors/general-instrument-cp1600/", "s": "One of the first single-chip 16-bit microprocessors, resembling the PDP-11."}, {"n": "Harris RTX 2000", "u": "/e/microprocessors/harris-rtx-2000/", "s": "A Forth-native stack machine for real-time and space systems."}, {"n": "IMP-16", "u": "/e/microprocessors/imp-16/", "s": "First multi-chip 16-bit microprocessor, bit-slice design from National Semiconductor."}, {"n": "Intel 8086", "u": "/e/microprocessors/intel-8086/", "s": "The 16-bit microprocessor that launched the x86 architecture."}, {"n": "Intel 8088", "u": "/e/microprocessors/intel-8088/", "s": "Lower-cost 8086 variant with 8-bit bus, used in the IBM PC."}, {"n": "Intel 80186", "u": "/e/microprocessors/intel-80186/", "s": "A 16-bit microprocessor with integrated peripherals for embedded systems."}, {"n": "Intel 80286", "u": "/e/microprocessors/intel-80286/", "s": "First x86 CPU with memory management and protected mode."}, {"n": "K1810VM86", "u": "/e/microprocessors/k1810vm86/", "s": "Soviet clone of the Intel 8086, widely used in Eastern Bloc computers."}, {"n": "National Semiconductor PACE", "u": "/e/microprocessors/national-semiconductor-pace/", "s": "First commercial single-chip 16-bit microprocessor, announced late 1974."}, {"n": "NEC µPD768", "u": "/e/microprocessors/nec-pd768/", "s": "NEC's original single-chip 16-bit microprocessor, announced in 1978."}, {"n": "NEC V20", "u": "/e/microprocessors/nec-v20/", "s": "An 8088-compatible CPU with extended instructions and 8080 emulation."}, {"n": "TMS9900", "u": "/e/microprocessors/tms9900/", "s": "Single-chip 16-bit microprocessor implementing TI-990 minicomputer architecture."}, {"n": "Transputer", "u": "/e/microprocessors/transputer/", "s": "A pioneering parallel microprocessor with integrated memory and serial links."}, {"n": "U80601", "u": "/e/microprocessors/u80601/", "s": "East German clone of the Intel 80286 microprocessor."}, {"n": "WDC 65C816", "u": "/e/microprocessors/wdc-65c816/", "s": "16-bit CPU for Apple IIGS and Super NES."}, {"n": "Zilog Z280", "u": "/e/microprocessors/zilog-z280/", "s": "A 16-bit Z80 enhancement with MMU, cache, and multiprocessor support."}, {"n": "Zilog Z800", "u": "/e/microprocessors/zilog-z800/", "s": "A 16-bit Z80-compatible microprocessor with on-chip cache and MMU."}, {"n": "Zilog Z8000", "u": "/e/microprocessors/zilog-z8000/", "s": "A 16-bit microprocessor without microcode, released in two address-bus variants."}, {"n": "Motorola 56000", "u": "/e/microprocessors/motorola-56000/", "s": "A 24-bit fixed-point DSP family introduced in 1986."}, {"n": "Zilog eZ80", "u": "/e/microprocessors/zilog-ez80/", "s": "Updated Z80 with 24-bit addressing and three-stage pipeline."}, {"n": "AMD Am29000", "u": "/e/microprocessors/amd-am29000/", "s": "32-bit RISC family with variable register windows and embedded focus."}, {"n": "Apollo PRISM", "u": "/e/microprocessors/apollo-prism/", "s": "A VLIW CPU that briefly held the title of fastest microprocessor."}, {"n": "Apple silicon", "u": "/e/microprocessors/apple-silicon/", "s": "Apple's in-house ARM-based SoCs and SiPs for nearly all devices."}, {"n": "ARM Cortex-M", "u": "/e/microprocessors/arm-cortex-m/", "s": "32-bit RISC cores for low-cost, energy-efficient embedded devices."}, {"n": "ARM Cortex-R", "u": "/e/microprocessors/arm-cortex-r/", "s": "ARM cores for hard real-time and safety-critical applications."}, {"n": "ARM9", "u": "/e/microprocessors/arm9/", "s": "ARM9 cores introduced a five-stage pipeline and Harvard architecture."}, {"n": "ARM11", "u": "/e/microprocessors/arm11/", "s": "ARMv6 32-bit RISC cores for demanding applications."}, {"n": "Baikal CPU", "u": "/e/microprocessors/baikal-cpu/", "s": "Russian microprocessor line using MIPS, RISC-V, and ARM cores."}, {"n": "Bellmac 32", "u": "/e/microprocessors/bellmac-32/", "s": "First 32-bit microprocessor to move 32 bits per clock cycle."}, {"n": "Clipper architecture", "u": "/e/microprocessors/clipper-architecture/", "s": "A 32-bit RISC-like architecture with macro instructions and limited market adoption."}, {"n": "CVAX", "u": "/e/microprocessors/cvax/", "s": "DEC's second-generation single-chip VAX microprocessor chipset."}, {"n": "DEC V-11", "u": "/e/microprocessors/dec-v-11/", "s": "DEC's first VAX microprocessor design, second to ship."}, {"n": "ELVEES Multicore", "u": "/e/microprocessors/elvees-multicore/", "s": "Russian series of 32-bit microprocessors with embedded DSP cores."}, {"n": "EnCore Processor", "u": "/e/microprocessors/encore-processor/", "s": "Compact 32-bit RISC family with high frequency and low energy."}, {"n": "HP FOCUS", "u": "/e/microprocessors/hp-focus/", "s": "First commercial single-chip fully 32-bit microprocessor."}, {"n": "I486 OverDrive", "u": "/e/microprocessors/i486-overdrive/", "s": "Intel's upgrade processors for 486-based personal computers."}, {"n": "Ignite (microprocessor)", "u": "/e/microprocessors/ignite-microprocessor/", "s": "A two-stack RISC microprocessor for embedded and virtual machine execution."}, {"n": "I486SX", "u": "/e/microprocessors/i486sx/", "s": "A lower-cost i486 with its floating-point unit disabled."}, {"n": "Intel 80386EX", "u": "/e/microprocessors/intel-80386ex/", "s": "An embedded 386 variant used in satellites and many commercial devices."}, {"n": "Intel 80386SX", "u": "/e/microprocessors/intel-80386sx/", "s": "32-bit x86 processor with virtual 8086 mode and on-chip MMU."}, {"n": "Intel i860", "u": "/e/microprocessors/intel-i860/", "s": "Intel's first million-transistor RISC chip with VLIW architecture."}, {"n": "Intel i960", "u": "/e/microprocessors/intel-i960/", "s": "A RISC embedded microcontroller that became a best-selling 32-bit CPU."}, {"n": "KOMDIV-32", "u": "/e/microprocessors/komdiv-32/", "s": "Radiation-hardened MIPS-compatible microprocessors for Russian spacecraft."}, {"n": "MicroVAX 78032", "u": "/e/microprocessors/microvax-78032/", "s": "DEC's first single-chip VAX microprocessor, used in the MicroVAX II."}, {"n": "MIPS architecture processors", "u": "/e/microprocessors/mips-architecture-processors/", "s": "RISC architecture from Stanford, widely licensed and used in diverse systems."}, {"n": "MIPS-X", "u": "/e/microprocessors/mips-x/", "s": "A RISC follow-on to MIPS, never commercialized as a workstation CPU."}, {"n": "Motorola 68000", "u": "/e/microprocessors/motorola-68000/", "s": "A 16/32-bit CISC microprocessor introduced in 1979 by Motorola."}, {"n": "Motorola 68010", "u": "/e/microprocessors/motorola-68010/", "s": "A 68000 successor adding virtualization and loop acceleration."}, {"n": "Motorola 68020", "u": "/e/microprocessors/motorola-68020/", "s": "Motorola's fully 32-bit microprocessor, released in 1984."}, {"n": "Motorola 68040", "u": "/e/microprocessors/motorola-68040/", "s": "First 680x0 with on-chip FPU and MMU; used in Mac Quadra."}, {"n": "Motorola 68060", "u": "/e/microprocessors/motorola-68060/", "s": "Last and fastest general-purpose 68000 family processor from Motorola."}, {"n": "Motorola 88000", "u": "/e/microprocessors/motorola-88000/", "s": "Motorola's late RISC contender, overshadowed by PowerPC."}, {"n": "Motorola 88100", "u": "/e/microprocessors/motorola-88100/", "s": "Motorola's first 88000 RISC microprocessor, announced in 1988."}, {"n": "Motorola 88110", "u": "/e/microprocessors/motorola-88110/", "s": "Motorola's second-generation 88000 RISC microprocessor for workstations."}, {"n": "Motorola 96000", "u": "/e/microprocessors/motorola-96000/", "s": "A floating-point DSP family based on the Motorola 56000."}, {"n": "NCR/32", "u": "/e/microprocessors/ncr-32/", "s": "Externally microprogrammable 32-bit chipset from NCR."}, {"n": "NEC V60", "u": "/e/microprocessors/nec-v60/", "s": "Japan's first commercial 32-bit general-purpose microprocessor."}, {"n": "Nexperia (processor)", "u": "/e/microprocessors/nexperia-processor/", "s": "Nexperia was NXP's brand for media and mobile SoCs."}, {"n": "NS32000", "u": "/e/microprocessors/ns32000/", "s": "Early 32-bit CISC microprocessor family from National Semiconductor."}, {"n": "NVAX", "u": "/e/microprocessors/nvax/", "s": "A CMOS VAX microprocessor used in late-model DEC systems."}, {"n": "PA-7100", "u": "/e/microprocessors/pa-7100/", "s": "First PA-RISC microprocessor with on-die floating-point unit."}, {"n": "PA-7100LC", "u": "/e/microprocessors/pa-7100lc/", "s": "Low-cost PA-RISC microprocessor with on-die memory controller and MAX-1 SIMD."}, {"n": "PA-7200", "u": "/e/microprocessors/pa-7200/", "s": "PA-RISC microprocessor for small multiprocessor systems, derived from PA-7100."}, {"n": "Pentium (original)", "u": "/e/microprocessors/pentium-original/", "s": "Intel's first superscalar x86 processor, introduced March 22, 1993."}, {"n": "Pentium 4", "u": "/e/microprocessors/pentium-4/", "s": "Intel's NetBurst-based flagship, known for high clock speeds and mixed reviews."}, {"n": "Pentium III", "u": "/e/microprocessors/pentium-iii/", "s": "Intel's 32-bit x86 processor with SSE and embedded serial number."}, {"n": "Alpha 21064", "u": "/e/microprocessors/alpha-21064/", "s": "First commercial Alpha microprocessor, introduced in 1992."}, {"n": "Alpha 21164", "u": "/e/microprocessors/alpha-21164/", "s": "A four-issue superscalar Alpha microprocessor with on-die secondary cache."}, {"n": "Alpha 21264", "u": "/e/microprocessors/alpha-21264/", "s": "A four-issue superscalar RISC microprocessor with out-of-order execution."}, {"n": "Alpha 21364", "u": "/e/microprocessors/alpha-21364/", "s": "An Alpha microprocessor with integrated memory and network controllers."}, {"n": "ARM C-series", "u": "/e/microprocessors/arm-c-series/", "s": "ARM's 2025 processor family with integrated SME2 for AI."}, {"n": "Athlon 64", "u": "/e/microprocessors/athlon-64/", "s": "First 64-bit processor for the average consumer."}, {"n": "Cell (processor)", "u": "/e/microprocessors/cell-processor/", "s": "A hybrid multi-core processor for multimedia and high-performance computing."}, {"n": "Intel Core 2", "u": "/e/microprocessors/intel-core-2/", "s": "Intel's last flagship desktop processors using a front-side bus."}]